Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /* memset.S */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) #include <asm/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) #if defined(CONFIG_CPU_H8300H)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	.h8300h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #if defined(CONFIG_CPU_H8S)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	.h8300s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	.text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) .global	memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) .global	clear_user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) ;;void *memset(*ptr, int c, size_t count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) ;; ptr = er0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ;; c   = er1(r1l)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) ;; count = er2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) memset:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	btst	#0,r0l
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	beq	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	;; odd address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	mov.b	r1l,@er0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	adds	#1,er0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	dec.l	#1,er2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	beq	6f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	;; even address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	mov.l	er2,er3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	cmp.l	#4,er2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	blo	4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	;; count>=4 -> count/4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #if defined(CONFIG_CPU_H8300H)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	shlr.l	er2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	shlr.l	er2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #if defined(CONFIG_CPU_H8S)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	shlr.l	#2,er2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	;; byte -> long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	mov.b	r1l,r1h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	mov.w	r1,e1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	mov.l	er1,@er0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	adds	#4,er0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	dec.l	#1,er2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	bne	3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	;; count % 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	and.b	#3,r3l
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	beq	6f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	mov.b	r1l,@er0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	adds	#1,er0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	dec.b	r3l
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	bne	5b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) clear_user:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	mov.l	er1, er2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	sub.l	er1, er1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	bra	memset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	.end