^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/syscalls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/cachectl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) SYSCALL_DEFINE3(cacheflush,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) void __user *, addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) unsigned long, bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) int, cache)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) switch (cache) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) case BCACHE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) case DCACHE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) dcache_wb_range((unsigned long)addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) (unsigned long)addr + bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) if (cache != BCACHE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) case ICACHE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) flush_icache_mm_range(current->mm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) (unsigned long)addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) (unsigned long)addr + bytes);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }