^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #ifndef __ASM_CSKY_CMPXCHG_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #define __ASM_CSKY_CMPXCHG_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifdef CONFIG_CPU_HAS_LDSTEX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/barrier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) extern void __bad_xchg(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __xchg(new, ptr, size) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) __typeof__(ptr) __ptr = (ptr); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) __typeof__(new) __new = (new); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) __typeof__(*(ptr)) __ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) unsigned long tmp; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) switch (size) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) case 4: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) smp_mb(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) asm volatile ( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) "1: ldex.w %0, (%3) \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) " mov %1, %2 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) " stex.w %1, (%3) \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) " bez %1, 1b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) : "=&r" (__ret), "=&r" (tmp) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) : "r" (__new), "r"(__ptr) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) :); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) smp_mb(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) break; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) default: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) __bad_xchg(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) __ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define xchg(ptr, x) (__xchg((x), (ptr), sizeof(*(ptr))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define __cmpxchg(ptr, old, new, size) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) __typeof__(ptr) __ptr = (ptr); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) __typeof__(new) __new = (new); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) __typeof__(new) __tmp; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) __typeof__(old) __old = (old); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) __typeof__(*(ptr)) __ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) switch (size) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) case 4: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) smp_mb(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) asm volatile ( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) "1: ldex.w %0, (%3) \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) " cmpne %0, %4 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) " bt 2f \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) " mov %1, %2 \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) " stex.w %1, (%3) \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) " bez %1, 1b \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) "2: \n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) : "=&r" (__ret), "=&r" (__tmp) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) : "r" (__new), "r"(__ptr), "r"(__old) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) :); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) smp_mb(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) break; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) default: \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) __bad_xchg(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) __ret; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define cmpxchg(ptr, o, n) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) (__cmpxchg((ptr), (o), (n), sizeof(*(ptr))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #include <asm-generic/cmpxchg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif /* __ASM_CSKY_CMPXCHG_H */