^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ; SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ; Port on Texas Instruments TMS320C6x architecture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) ; Copyright (C) 2006, 2009, 2010 Texas Instruments Incorporated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) ; Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) ENTRY(memcpy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) AND .L1 0x1,A6,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) || AND .S1 0x2,A6,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) || AND .L2X 0x4,A6,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) || MV .D1 A4,A3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) || MVC .S2 ILC,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) [A0] LDB .D2T1 *B4++,A5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) [A1] LDB .D2T1 *B4++,A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) [A1] LDB .D2T1 *B4++,A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) [B0] LDNW .D2T1 *B4++,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) || SHRU .S2X A6,0x3,B1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) [!B1] BNOP .S2 B3,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) [A0] STB .D1T1 A5,*A3++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) ||[B1] MVC .S2 B1,ILC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) [A1] STB .D1T1 A7,*A3++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) [A1] STB .D1T1 A8,*A3++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) [B0] STNW .D1T1 A9,*A3++ ; return when len < 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) SPLOOP 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) LDNDW .D2T1 *B4++,A9:A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) NOP 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) NOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) SPKERNEL 0,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) || STNDW .D1T1 A9:A8,*A3++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) BNOP .S2 B3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MVC .S2 B2,ILC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ENDPROC(memcpy)