Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) ; SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) ;  linux/arch/c6x/lib/csum_64plus.s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) ;  Port on Texas Instruments TMS320C6x architecture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) ;  Copyright (C) 2006, 2009, 2010, 2011 Texas Instruments Incorporated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) ;  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) ;unsigned int csum_partial_copy_nocheck(const char *src, char * dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) ;					int len, int sum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) ; A4:	src
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) ; B4:	dst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) ; A6:	len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) ; B6:	sum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) ; return csum in A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	.text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) ENTRY(csum_partial_copy_nocheck)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	MVC	.S2	ILC,B30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	ZERO	.D1	A9		; csum (a side)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) ||	ZERO	.D2	B9		; csum (b side)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) ||	SHRU	.S2X	A6,2,B5		; len / 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	;; Check alignment and size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	AND	.S1	3,A4,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) ||	AND	.S2	3,B4,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	OR	.L2X	B0,A1,B0	; non aligned condition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) ||	MVC	.S2	B5,ILC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) ||	MVK	.D2	1,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) ||	MV	.D1X	B5,A1		; words condition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)   [!A1]	B	.S1	L8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)    [B0] BNOP	.S1	L6,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	SPLOOP		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	;; Main loop for aligned words
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	LDW	.D1T1	*A4++,A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	NOP	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	MV	.S2X	A7,B7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) ||	EXTU	.S1	A7,0,16,A16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	STW	.D2T2	B7,*B4++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) ||	MPYU	.M2	B7,B2,B8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) ||	ADD	.L1	A16,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	NOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	SPKERNEL	8,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) ||	ADD	.L2	B8,B9,B9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	ZERO	.D1	A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) ||	ADD	.L1X	A9,B9,A9	;  add csum from a and b sides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) L6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)   [!A1]	BNOP	.S1	L8,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	;; Main loop for non-aligned words
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	SPLOOP		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  ||	MVK	.L1	1,A2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	LDNW	.D1T1	*A4++,A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	NOP		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	NOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	MV	.S2X	A7,B7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  ||	EXTU	.S1	A7,0,16,A16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  ||	MPYU	.M1	A7,A2,A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	ADD	.L1	A16,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	SPKERNEL	6,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75)  ||	STNW	.D2T2	B7,*B4++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  ||	ADD	.L1	A8,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) L8:	AND	.S2X	2,A6,B5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	CMPGT	.L2	B5,0,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)   [!B0]	BNOP	.S1	L82,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	;; Manage half-word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	ZERO	.L1	A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) ||	ZERO	.D1	A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #ifdef CONFIG_CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	LDBU	.D1T1	*A4++,A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	LDBU	.D1T1	*A4++,A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	NOP		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	SHL	.S1	A7,8,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	ADD	.S1	A8,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	STB	.D2T1	A7,*B4++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) ||	ADD	.S1	A0,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	STB	.D2T1	A8,*B4++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	LDBU	.D1T1	*A4++,A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	LDBU	.D1T1	*A4++,A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	NOP		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	ADD	.S1	A7,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	SHL	.S1	A8,8,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	STB	.D2T1	A7,*B4++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) ||	ADD	.S1	A0,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	STB	.D2T1	A8,*B4++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	;; Manage eventually the last byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) L82:	AND	.S2X	1,A6,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)   [!B0]	BNOP	.S1	L9,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ||	ZERO	.L1	A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) L83:	LDBU	.D1T1	*A4++,A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	NOP		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	MV	.L2X	A7,B7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #ifdef CONFIG_CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	STB	.D2T2	B7,*B4++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ||	SHL	.S1	A7,8,A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	ADD	.S1	A7,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	STB	.D2T2	B7,*B4++
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) ||	ADD	.S1	A7,A9,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	;; Fold the csum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) L9:	SHRU	.S2X	A9,16,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)   [!B0]	BNOP	.S1	L10,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) L91:	SHRU	.S2X	A9,16,B4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) ||	EXTU	.S1	A9,16,16,A3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	ADD	.D1X	A3,B4,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	SHRU	.S1	A9,16,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)    [A0]	BNOP	.S1	L91,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) L10:	MV	.D1	A9,A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	BNOP	.S2	B3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	MVC	.S2	B30,ILC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ENDPROC(csum_partial_copy_nocheck)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ;unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) ;ip_fast_csum(unsigned char *iph, unsigned int ihl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ;{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ;	unsigned int checksum = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) ;	unsigned short *tosum = (unsigned short *) iph;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) ;	int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ;	len = ihl*4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) ;	if (len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ;		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ;	while(len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ;		len -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ;		checksum += *tosum++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ;	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ;	if (len & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ;		checksum += *(unsigned char*) tosum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ;	while(checksum >> 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) ;		checksum = (checksum & 0xffff) + (checksum >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) ;	return ~checksum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ;}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ; A4:	iph
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ; B4:	ihl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ; return checksum in A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	.text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) ENTRY(ip_fast_csum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	ZERO	.D1	A5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)  ||	MVC	.S2	ILC,B30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	SHL	.S2	B4,2,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	CMPGT	.L2	B0,0,B1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)   [!B1] BNOP	.S1	L15,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)   [!B1]	ZERO	.D1	A3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)   [!B0]	B	.S1	L12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	SHRU	.S2	B0,1,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	MVC	.S2	B0,ILC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	NOP	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	SPLOOP	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	LDHU	.D1T1	*A4++,A3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	NOP	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	NOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	SPKERNEL	5,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)  ||	ADD	.L1	A3,A5,A5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) L12:	SHRU	.S1	A5,16,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)   [!A0]	BNOP	.S1	L14,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) L13:	SHRU	.S2X	A5,16,B4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	EXTU	.S1	A5,16,16,A3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	ADD	.D1X	A3,B4,A5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	SHRU	.S1	A5,16,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)   [A0]	BNOP	.S1	L13,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) L14:	NOT	.D1	A5,A3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	EXTU	.S1	A3,16,16,A3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) L15:	BNOP	.S2	B3,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	MVC	.S2	B30,ILC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	MV	.D1	A3,A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) ENDPROC(ip_fast_csum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ;unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ;do_csum(unsigned char *buff, unsigned int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ;{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ;	int odd, count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ;	unsigned int result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ;	if (len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) ;		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ;	odd = 1 & (unsigned long) buff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) ;	if (odd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ;#ifdef __LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ;		result += (*buff << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ;#else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ;		result = *buff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ;#endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ;		len--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ;		buff++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ;	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ;	count = len >> 1;		/* nr of 16-bit words.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ;	if (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ;		if (2 & (unsigned long) buff) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) ;			result += *(unsigned short *) buff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ;			count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ;			len -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ;			buff += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ;		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) ;		count >>= 1;		/* nr of 32-bit words.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) ;		if (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ;			unsigned int carry = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ;			do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ;				unsigned int w = *(unsigned int *) buff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ;				count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) ;				buff += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ;				result += carry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ;				result += w;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ;				carry = (w > result);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ;			} while (count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ;			result += carry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ;			result = (result & 0xffff) + (result >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ;		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ;		if (len & 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) ;			result += *(unsigned short *) buff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ;			buff += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ;		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ;	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) ;	if (len & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ;#ifdef __LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) ;		result += *buff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ;#else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ;		result += (*buff << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) ;#endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ;	result = (result & 0xffff) + (result >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ;	/* add up carry.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) ;	result = (result & 0xffff) + (result >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ;	if (odd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) ;		result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ;out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ;	return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ;}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ; A4:	buff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ; B4:	len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ; return checksum in A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) ENTRY(do_csum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	   CMPGT   .L2	   B4,0,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)    [!B0]   BNOP    .S1	   L26,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	   EXTU    .S1	   A4,31,31,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	   MV	   .L1	   A0,A3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ||	   MV	   .S1X    B3,A5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) ||	   MV	   .L2	   B4,B3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ||	   ZERO    .D1	   A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) #ifdef CONFIG_CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)    [A0]    SUB	   .L2	   B3,1,B3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) || [A0]    LDBU    .D1T1   *A4++,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)    [!A0]   BNOP    .S1	   L21,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) || [A0]    LDBU    .D1T1   *A4++,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	   SUB	   .L2	   B3,1,B3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ||	   SHL	   .S1	   A0,8,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) L21:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	   SHR	   .S2	   B3,1,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)    [!B0]   BNOP    .S1	   L24,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	   MVK	   .L1	   2,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	   AND	   .L1	   A4,A0,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)    [!A0]   BNOP    .S1	   L22,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) || [A0]    LDHU    .D1T1   *A4++,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	   SUB	   .L2	   B0,1,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ||	   SUB	   .S2	   B3,2,B3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ||	   ADD	   .L1	   A0,A1,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) L22:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	   SHR	   .S2	   B0,1,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) ||	   ZERO    .L1	   A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)    [!B0]   BNOP    .S1	   L23,5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) || [B0]    MVC	   .S2	   B0,ILC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	   SPLOOP  3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	   SPMASK  L1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) ||	   MV	   .L1	   A1,A2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ||	   LDW	   .D1T1   *A4++,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	   NOP	   4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	   ADD	   .L1	   A0,A1,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	   ADD	   .L1	   A2,A0,A2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	   SPKERNEL 1,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ||	   CMPGTU  .L1	   A1,A2,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	   ADD	   .L1	   A0,A2,A6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	   EXTU    .S1	   A6,16,16,A7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	   SHRU    .S2X    A6,16,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	   NOP		   1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	   ADD	   .L1X    A7,B0,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) L23:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	   MVK	   .L2	   2,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	   AND	   .L2	   B3,B0,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)    [B0]    LDHU    .D1T1   *A4++,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	   NOP	   4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)    [B0]    ADD	   .L1	   A0,A1,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) L24:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	   EXTU    .S2	   B3,31,31,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) #ifdef CONFIG_CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)    [!B0]   BNOP    .S1	   L25,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) || [B0]    LDBU    .D1T1   *A4,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	   SHL	   .S1	   A0,8,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	   ADD	   .L1	   A0,A1,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) L25:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)    [B0]    LDBU    .D1T1   *A4,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	   NOP	   4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)    [B0]    ADD	   .L1	   A0,A1,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	   EXTU    .S1	   A1,16,16,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	   SHRU    .S2X    A1,16,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	   NOP	   1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	   ADD	   .L1X    A0,B0,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	   SHRU    .S1	   A0,16,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	   ADD	   .L1	   A0,A1,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	   EXTU    .S1	   A0,16,16,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 	   EXTU    .S1	   A1,16,24,A2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 	   EXTU    .S1	   A1,24,16,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ||	   MV	   .L2X    A3,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)    [B0]    OR	   .L1	   A0,A2,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) L26:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	   NOP	   1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 	   BNOP    .S2X    A5,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	   MV	   .L1	   A1,A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ENDPROC(do_csum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) ;__wsum csum_partial(const void *buff, int len, __wsum wsum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ;{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ;	unsigned int sum = (__force unsigned int)wsum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) ;	unsigned int result = do_csum(buff, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) ;	/* add in old sum, and carry.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) ;	result += sum;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ;	if (sum > result)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) ;		result += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) ;	return (__force __wsum)result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) ;}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) ENTRY(csum_partial)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	   MV	   .L1X    B3,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) ||	   CALLP   .S2	   do_csum,B3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) ||	   MV	   .S1	   A6,A8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	   BNOP    .S2X    A9,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	   ADD	   .L1	   A8,A4,A1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 	   CMPGTU  .L1	   A8,A1,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	   ADD	   .L1	   A1,A0,A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) ENDPROC(csum_partial)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) ;unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) ;ip_compute_csum(unsigned char *buff, unsigned int len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ; A4:	buff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) ; B4:	len
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) ; return checksum in A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) ENTRY(ip_compute_csum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	   MV	   .L1X    B3,A9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) ||	   CALLP   .S2	   do_csum,B3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	   BNOP    .S2X    A9,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	   NOT	   .S1	   A4,A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	   CLR     .S1	   A4,16,31,A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ENDPROC(ip_compute_csum)