Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) ; SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ;  Port on Texas Instruments TMS320C6x architecture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) ;  Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) ;  Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	__HEAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) ENTRY(_c_int00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	;; Save magic and pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	MV	.S1	A4,A10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	MV	.S2	B4,B10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	MVKL	.S2	__bss_start,B5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	MVKH	.S2	__bss_start,B5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	MVKL	.S2	__bss_stop,B6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	MVKH	.S2	__bss_stop,B6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	SUB	.L2	B6,B5,B6 ; bss size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	;; Set the stack pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	MVKL	.S2	current_ksp,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	MVKH	.S2	current_ksp,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	LDW	.D2T2	*B0,B15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	;; clear bss
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	SHR	.S2	B6,3,B0	  ; number of dwords to clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	ZERO	.L2	B13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	ZERO	.L2	B12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) bss_loop:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	BDEC	.S2	bss_loop,B0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	NOP	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	CMPLT	.L2	B0,0,B1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  [!B1]	STDW	.D2T2	B13:B12,*B5++[1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	NOP	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	AND	.D2	~7,B15,B15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	;; Clear GIE and PGIE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	MVC	.S2	CSR,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	CLR	.S2	B2,0,1,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	MVC	.S2	B2,CSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	MVC	.S2	TSR,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	CLR	.S2	B2,0,1,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	MVC	.S2	B2,TSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	MVC	.S2	ITSR,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	CLR	.S2	B2,0,1,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	MVC	.S2	B2,ITSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	MVC	.S2	NTSR,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	CLR	.S2	B2,0,1,B2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	MVC	.S2	B2,NTSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	;; pass DTB pointer to machine_init (or zero if none)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	MVKL	.S1	OF_DT_HEADER,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	MVKH	.S1	OF_DT_HEADER,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	CMPEQ	.L1	A10,A0,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)   [A0]	MV	.S1X	B10,A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)   [!A0] MVK	.S1	0,A4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #ifdef CONFIG_C6X_BIG_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	MVKL	.S1	machine_init,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	MVKH	.S1	machine_init,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	B	.S2X	A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	ADDKPC  .S2     0f,B3,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	CALLP	.S2	machine_init,B3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	;; Jump to Linux init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #ifdef CONFIG_C6X_BIG_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	MVKL	.S1	start_kernel,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	MVKH	.S1	start_kernel,A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	B	.S2X	A0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	B	.S2	start_kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 	NOP	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) L1:	BNOP	.S2	L1,5