Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * arch/c6x/boot/dts/evmc6678.dts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * EVMC6678 Evaluation Platform For TMS320C6678
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2012 Texas Instruments Incorporated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Author: Ken Cox <jkc@redhat.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /dts-v1/;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /include/ "tms320c6678.dtsi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) / {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	model = "Advantech EVMC6678";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	compatible = "advantech,evmc6678";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	chosen {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		bootargs = "root=/dev/nfs ip=dhcp rw";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	memory {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		device_type = "memory";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		reg = <0x80000000 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	soc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		megamod_pic: interrupt-controller@1800000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		       interrupts = < 12 13 14 15 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		timer8: timer@2280000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			interrupt-parent = <&megamod_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 			interrupts = < 66 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		timer9: timer@2290000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 			interrupt-parent = <&megamod_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			interrupts = < 68 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		timer10: timer@22A0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			interrupt-parent = <&megamod_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 			interrupts = < 70 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		timer11: timer@22B0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			interrupt-parent = <&megamod_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 			interrupts = < 72 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 		timer12: timer@22C0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 			interrupt-parent = <&megamod_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 			interrupts = < 74 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		timer13: timer@22D0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 			interrupt-parent = <&megamod_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 			interrupts = < 76 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		timer14: timer@22E0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 			interrupt-parent = <&megamod_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 			interrupts = < 78 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		timer15: timer@22F0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 			interrupt-parent = <&megamod_pic>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 			interrupts = < 80 >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 		clock-controller@2310000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 			clock-frequency = <100000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) };