^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2012 - ARM Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Marc Zyngier <marc.zyngier@arm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/arm-smccc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/preempt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kvm_host.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/cputype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/kvm_emulate.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <kvm/arm_psci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <kvm/arm_hypercalls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * This is an implementation of the Power State Coordination Interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * as described in ARM document number ARM DEN 0022A.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static unsigned long psci_affinity_mask(unsigned long affinity_level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) if (affinity_level <= 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * NOTE: For simplicity, we make VCPU suspend emulation to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * same-as WFI (Wait-for-interrupt) emulation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * This means for KVM the wakeup events are interrupts and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * this is consistent with intended use of StateID as described
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Further, we also treat power-down request to be same as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * specification (ARM DEN 0022A). This means all suspend states
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * for KVM will preserve the register state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) kvm_vcpu_block(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) kvm_clear_request(KVM_REQ_UNHALT, vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return PSCI_RET_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) vcpu->arch.power_off = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) kvm_make_request(KVM_REQ_SLEEP, vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) kvm_vcpu_kick(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct vcpu_reset_state *reset_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct kvm *kvm = source_vcpu->kvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct kvm_vcpu *vcpu = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) unsigned long cpu_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) cpu_id = smccc_get_arg1(source_vcpu) & MPIDR_HWID_BITMASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) if (vcpu_mode_is_32bit(source_vcpu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) cpu_id &= ~((u32) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * Make sure the caller requested a valid CPU and that the CPU is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * turned off.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (!vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return PSCI_RET_INVALID_PARAMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (!vcpu->arch.power_off) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) if (kvm_psci_version(source_vcpu, kvm) != KVM_ARM_PSCI_0_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return PSCI_RET_ALREADY_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return PSCI_RET_INVALID_PARAMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) reset_state = &vcpu->arch.reset_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) reset_state->pc = smccc_get_arg2(source_vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /* Propagate caller endianness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) reset_state->be = kvm_vcpu_is_be(source_vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * NOTE: We always update r0 (or x0) because for PSCI v0.1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * the general purpose registers are undefined upon CPU_ON.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) reset_state->r0 = smccc_get_arg3(source_vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) WRITE_ONCE(reset_state->reset, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) kvm_make_request(KVM_REQ_VCPU_RESET, vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * Make sure the reset request is observed if the change to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * power_state is observed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) smp_wmb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) vcpu->arch.power_off = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) kvm_vcpu_wake_up(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return PSCI_RET_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int i, matching_cpus = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned long mpidr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) unsigned long target_affinity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned long target_affinity_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned long lowest_affinity_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct kvm *kvm = vcpu->kvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct kvm_vcpu *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) target_affinity = smccc_get_arg1(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) lowest_affinity_level = smccc_get_arg2(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Determine target affinity mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (!target_affinity_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return PSCI_RET_INVALID_PARAMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Ignore other bits of target affinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) target_affinity &= target_affinity_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * If one or more VCPU matching target affinity are running
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * then ON else OFF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) kvm_for_each_vcpu(i, tmp, kvm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) mpidr = kvm_vcpu_get_mpidr_aff(tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if ((mpidr & target_affinity_mask) == target_affinity) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) matching_cpus++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (!tmp->arch.power_off)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return PSCI_0_2_AFFINITY_LEVEL_ON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (!matching_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return PSCI_RET_INVALID_PARAMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) return PSCI_0_2_AFFINITY_LEVEL_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) struct kvm_vcpu *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * The KVM ABI specifies that a system event exit may call KVM_RUN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * again and may perform shutdown/reboot at a later time that when the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * actual request is made. Since we are implementing PSCI and a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * caller of PSCI reboot and shutdown expects that the system shuts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * down or reboots immediately, let's make sure that VCPUs are not run
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * after this call is handled and before the VCPUs have been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * re-initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) kvm_for_each_vcpu(i, tmp, vcpu->kvm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) tmp->arch.power_off = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) kvm_make_all_cpus_request(vcpu->kvm, KVM_REQ_SLEEP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) vcpu->run->system_event.type = type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static void kvm_psci_narrow_to_32bit(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * Zero the input registers' upper 32 bits. They will be fully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * zeroed on exit, so we're fine changing them in place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) for (i = 1; i < 4; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) vcpu_set_reg(vcpu, i, lower_32_bits(vcpu_get_reg(vcpu, i)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static unsigned long kvm_psci_check_allowed_function(struct kvm_vcpu *vcpu, u32 fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) switch(fn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) case PSCI_0_2_FN64_CPU_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) case PSCI_0_2_FN64_CPU_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) case PSCI_0_2_FN64_AFFINITY_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* Disallow these functions for 32bit guests */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (vcpu_mode_is_32bit(vcpu))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return PSCI_RET_NOT_SUPPORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct kvm *kvm = vcpu->kvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) u32 psci_fn = smccc_get_function(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) int ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) val = kvm_psci_check_allowed_function(vcpu, psci_fn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) switch (psci_fn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) case PSCI_0_2_FN_PSCI_VERSION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * Bits[31:16] = Major Version = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * Bits[15:0] = Minor Version = 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) val = KVM_ARM_PSCI_0_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) case PSCI_0_2_FN_CPU_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) case PSCI_0_2_FN64_CPU_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) val = kvm_psci_vcpu_suspend(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) case PSCI_0_2_FN_CPU_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) kvm_psci_vcpu_off(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) val = PSCI_RET_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) case PSCI_0_2_FN_CPU_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) kvm_psci_narrow_to_32bit(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) case PSCI_0_2_FN64_CPU_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) mutex_lock(&kvm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) val = kvm_psci_vcpu_on(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) mutex_unlock(&kvm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) case PSCI_0_2_FN_AFFINITY_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) kvm_psci_narrow_to_32bit(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) case PSCI_0_2_FN64_AFFINITY_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) val = kvm_psci_vcpu_affinity_info(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * Trusted OS is MP hence does not require migration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) * Trusted OS is not present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) val = PSCI_0_2_TOS_MP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) case PSCI_0_2_FN_SYSTEM_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) kvm_psci_system_off(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) * We shouldn't be going back to guest VCPU after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * receiving SYSTEM_OFF request.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * If user space accidentally/deliberately resumes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * guest VCPU after SYSTEM_OFF request then guest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * VCPU should see internal failure from PSCI return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * value. To achieve this, we preload r0 (or x0) with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * PSCI return value INTERNAL_FAILURE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) val = PSCI_RET_INTERNAL_FAILURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) case PSCI_0_2_FN_SYSTEM_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) kvm_psci_system_reset(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * Same reason as SYSTEM_OFF for preloading r0 (or x0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) * with PSCI return value INTERNAL_FAILURE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) val = PSCI_RET_INTERNAL_FAILURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) val = PSCI_RET_NOT_SUPPORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) smccc_set_retval(vcpu, val, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) static int kvm_psci_1_0_call(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) u32 psci_fn = smccc_get_function(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) u32 feature;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) int ret = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) switch(psci_fn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) case PSCI_0_2_FN_PSCI_VERSION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) val = KVM_ARM_PSCI_1_0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) case PSCI_1_0_FN_PSCI_FEATURES:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) feature = smccc_get_arg1(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) val = kvm_psci_check_allowed_function(vcpu, feature);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) if (val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) switch(feature) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) case PSCI_0_2_FN_PSCI_VERSION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) case PSCI_0_2_FN_CPU_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) case PSCI_0_2_FN64_CPU_SUSPEND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) case PSCI_0_2_FN_CPU_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) case PSCI_0_2_FN_CPU_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) case PSCI_0_2_FN64_CPU_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) case PSCI_0_2_FN_AFFINITY_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) case PSCI_0_2_FN64_AFFINITY_INFO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) case PSCI_0_2_FN_SYSTEM_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) case PSCI_0_2_FN_SYSTEM_RESET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) case PSCI_1_0_FN_PSCI_FEATURES:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) case ARM_SMCCC_VERSION_FUNC_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) val = PSCI_RET_NOT_SUPPORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return kvm_psci_0_2_call(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) smccc_set_retval(vcpu, val, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) struct kvm *kvm = vcpu->kvm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) u32 psci_fn = smccc_get_function(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) switch (psci_fn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) case KVM_PSCI_FN_CPU_OFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) kvm_psci_vcpu_off(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) val = PSCI_RET_SUCCESS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) case KVM_PSCI_FN_CPU_ON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) mutex_lock(&kvm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) val = kvm_psci_vcpu_on(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) mutex_unlock(&kvm->lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) val = PSCI_RET_NOT_SUPPORTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) smccc_set_retval(vcpu, val, 0, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * kvm_psci_call - handle PSCI call if r0 value is in range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * @vcpu: Pointer to the VCPU struct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * Handle PSCI calls from guests through traps from HVC instructions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * The calling convention is similar to SMC calls to the secure world
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * where the function number is placed in r0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * This function returns: > 0 (success), 0 (success but exit to user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * space), and < 0 (errors)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) * Errors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) * -EINVAL: Unrecognized PSCI function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int kvm_psci_call(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) switch (kvm_psci_version(vcpu, vcpu->kvm)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) case KVM_ARM_PSCI_1_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) return kvm_psci_1_0_call(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) case KVM_ARM_PSCI_0_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) return kvm_psci_0_2_call(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) case KVM_ARM_PSCI_0_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) return kvm_psci_0_1_call(vcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) return 4; /* PSCI version and three workaround registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices++))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, uindices++))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, uindices++))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, uindices++))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) #define KVM_REG_FEATURE_LEVEL_WIDTH 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #define KVM_REG_FEATURE_LEVEL_MASK (BIT(KVM_REG_FEATURE_LEVEL_WIDTH) - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * Convert the workaround level into an easy-to-compare number, where higher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * values mean better protection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static int get_kernel_wa_level(u64 regid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) switch (regid) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) switch (arm64_get_spectre_v2_state()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) case SPECTRE_VULNERABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) case SPECTRE_MITIGATED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) case SPECTRE_UNAFFECTED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) switch (arm64_get_spectre_v4_state()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) case SPECTRE_MITIGATED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * As for the hypercall discovery, we pretend we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * don't have any FW mitigation if SSBS is there at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * all times.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (cpus_have_final_cap(ARM64_SSBS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) case SPECTRE_UNAFFECTED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) case SPECTRE_VULNERABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) switch (arm64_get_spectre_bhb_state()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) case SPECTRE_VULNERABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) case SPECTRE_MITIGATED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) case SPECTRE_UNAFFECTED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) void __user *uaddr = (void __user *)(long)reg->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) u64 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) switch (reg->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) case KVM_REG_ARM_PSCI_VERSION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) val = kvm_psci_version(vcpu, vcpu->kvm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) void __user *uaddr = (void __user *)(long)reg->addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) u64 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) int wa_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) switch (reg->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) case KVM_REG_ARM_PSCI_VERSION:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) bool wants_02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) switch (val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) case KVM_ARM_PSCI_0_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) if (wants_02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) vcpu->kvm->arch.psci_version = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) case KVM_ARM_PSCI_0_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) case KVM_ARM_PSCI_1_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (!wants_02)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) vcpu->kvm->arch.psci_version = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (get_kernel_wa_level(reg->id) < val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (val & ~(KVM_REG_FEATURE_LEVEL_MASK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* The enabled bit must not be set unless the level is AVAIL. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) (val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) * Map all the possible incoming states to the only two we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) * really want to deal with.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) switch (val & KVM_REG_FEATURE_LEVEL_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * We can deal with NOT_AVAIL on NOT_REQUIRED, but not the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * other way around.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (get_kernel_wa_level(reg->id) < wa_level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return -ENOENT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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