^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Based on arch/arm/kernel/traps.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1995-2009 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2012 ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/context_tracking.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/personality.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kallsyms.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/kprobes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/hardirq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kdebug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/kexec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/sched/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/sched/debug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/sched/task_stack.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/sizes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/syscalls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mm_types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/kasan.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/atomic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/cpufeature.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/daifflags.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/debug-monitors.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/esr.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/exception.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/extable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/insn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/kprobes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/traps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/stack_pointer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/stacktrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/exception.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <asm/system_misc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <asm/sysreg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <trace/hooks/traps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static const char *handler[]= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) "Synchronous Abort",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) "IRQ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) "FIQ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) "Error"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) int show_unhandled_signals = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void dump_kernel_instr(const char *lvl, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned long addr = instruction_pointer(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) if (user_mode(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) for (i = -4; i < 1; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned int val, bad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) bad = aarch64_insn_read(&((u32 *)addr)[i], &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (!bad)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) p += sprintf(p, "bad PC value");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) printk("%sCode: %s\n", lvl, str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #ifdef CONFIG_PREEMPT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define S_PREEMPT " PREEMPT"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #elif defined(CONFIG_PREEMPT_RT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define S_PREEMPT " PREEMPT_RT"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define S_PREEMPT ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define S_SMP " SMP"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int __die(const char *str, int err, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static int die_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) str, err, ++die_counter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* trap and error numbers are mostly meaningless on ARM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (ret == NOTIFY_STOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) print_modules();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) show_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dump_kernel_instr(KERN_EMERG, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static DEFINE_RAW_SPINLOCK(die_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * This function is protected against re-entrancy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) void die(const char *str, struct pt_regs *regs, int err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) raw_spin_lock_irqsave(&die_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) oops_enter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) console_verbose();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) bust_spinlocks(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ret = __die(str, err, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (regs && kexec_should_crash(current))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) crash_kexec(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) bust_spinlocks(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) oops_exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (in_interrupt())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) panic("%s: Fatal exception in interrupt", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) if (panic_on_oops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) panic("%s: Fatal exception", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) raw_spin_unlock_irqrestore(&die_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (ret != NOTIFY_STOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) do_exit(SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static void arm64_show_signal(int signo, const char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) DEFAULT_RATELIMIT_BURST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct task_struct *tsk = current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) unsigned int esr = tsk->thread.fault_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct pt_regs *regs = task_pt_regs(tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* Leave if the signal won't be shown */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (!show_unhandled_signals ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) !unhandled_signal(tsk, signo) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) !__ratelimit(&rs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) pr_info("%s[%d]: unhandled exception: ", tsk->comm, task_pid_nr(tsk));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) pr_cont("%s, ESR 0x%08x, ", esr_get_class_string(esr), esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) pr_cont("%s", str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) print_vma_addr(KERN_CONT " in ", regs->pc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) pr_cont("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) __show_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) void arm64_force_sig_fault(int signo, int code, unsigned long far,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) const char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) arm64_show_signal(signo, str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (signo == SIGKILL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) force_sig(SIGKILL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) force_sig_fault(signo, code, (void __user *)far);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) void arm64_force_sig_mceerr(int code, unsigned long far, short lsb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) const char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) arm64_show_signal(SIGBUS, str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) force_sig_mceerr(code, (void __user *)far, lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) void arm64_force_sig_ptrace_errno_trap(int errno, unsigned long far,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) const char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) arm64_show_signal(SIGTRAP, str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) force_sig_ptrace_errno_trap(errno, (void __user *)far);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) void arm64_notify_die(const char *str, struct pt_regs *regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int signo, int sicode, unsigned long far,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (user_mode(regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) WARN_ON(regs != current_pt_regs());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) current->thread.fault_address = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) current->thread.fault_code = err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) arm64_force_sig_fault(signo, sicode, far, str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) die(str, regs, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define PSTATE_IT_1_0_SHIFT 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define PSTATE_IT_1_0_MASK (0x3 << PSTATE_IT_1_0_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define PSTATE_IT_7_2_SHIFT 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) #define PSTATE_IT_7_2_MASK (0x3f << PSTATE_IT_7_2_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) static u32 compat_get_it_state(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) u32 it, pstate = regs->pstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) it = (pstate & PSTATE_IT_1_0_MASK) >> PSTATE_IT_1_0_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) it |= ((pstate & PSTATE_IT_7_2_MASK) >> PSTATE_IT_7_2_SHIFT) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) return it;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) static void compat_set_it_state(struct pt_regs *regs, u32 it)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) u32 pstate_it;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) pstate_it = (it << PSTATE_IT_1_0_SHIFT) & PSTATE_IT_1_0_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) pstate_it |= ((it >> 2) << PSTATE_IT_7_2_SHIFT) & PSTATE_IT_7_2_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) regs->pstate &= ~PSR_AA32_IT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) regs->pstate |= pstate_it;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static void advance_itstate(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) u32 it;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /* ARM mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (!(regs->pstate & PSR_AA32_T_BIT) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) !(regs->pstate & PSR_AA32_IT_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) it = compat_get_it_state(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) * If this is the last instruction of the block, wipe the IT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * state. Otherwise advance it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (!(it & 7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) it = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) it = (it & 0xe0) | ((it << 1) & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) compat_set_it_state(regs, it);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static void advance_itstate(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) regs->pc += size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) * If we were single stepping, we want to get the step exception after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * we return from the trap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (user_mode(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) user_fastforward_single_step(current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (compat_user_mode(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) advance_itstate(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) regs->pstate &= ~PSR_BTYPE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static LIST_HEAD(undef_hook);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static DEFINE_RAW_SPINLOCK(undef_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) void register_undef_hook(struct undef_hook *hook)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) raw_spin_lock_irqsave(&undef_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) list_add(&hook->node, &undef_hook);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) raw_spin_unlock_irqrestore(&undef_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) void unregister_undef_hook(struct undef_hook *hook)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) raw_spin_lock_irqsave(&undef_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) list_del(&hook->node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) raw_spin_unlock_irqrestore(&undef_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) static int call_undef_hook(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) struct undef_hook *hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) u32 instr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) void __user *pc = (void __user *)instruction_pointer(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (!user_mode(regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) __le32 instr_le;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (get_kernel_nofault(instr_le, (__force __le32 *)pc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) instr = le32_to_cpu(instr_le);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) } else if (compat_thumb_mode(regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* 16-bit Thumb instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) __le16 instr_le;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (get_user(instr_le, (__le16 __user *)pc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) instr = le16_to_cpu(instr_le);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (aarch32_insn_is_wide(instr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) u32 instr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (get_user(instr_le, (__le16 __user *)(pc + 2)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) instr2 = le16_to_cpu(instr_le);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) instr = (instr << 16) | instr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* 32-bit ARM instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) __le32 instr_le;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (get_user(instr_le, (__le32 __user *)pc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) instr = le32_to_cpu(instr_le);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) raw_spin_lock_irqsave(&undef_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) list_for_each_entry(hook, &undef_hook, node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if ((instr & hook->instr_mask) == hook->instr_val &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) (regs->pstate & hook->pstate_mask) == hook->pstate_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) fn = hook->fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) raw_spin_unlock_irqrestore(&undef_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return fn ? fn(regs, instr) : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) void force_signal_inject(int signal, int code, unsigned long address, unsigned int err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) const char *desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct pt_regs *regs = current_pt_regs();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (WARN_ON(!user_mode(regs)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) switch (signal) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) case SIGILL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) desc = "undefined instruction";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) case SIGSEGV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) desc = "illegal memory access";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) desc = "unknown or unrecoverable error";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* Force signals we don't understand to SIGKILL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) if (WARN_ON(signal != SIGKILL &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) siginfo_layout(signal, code) != SIL_FAULT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) signal = SIGKILL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) arm64_notify_die(desc, regs, signal, code, address, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) * Set up process info to signal segmentation fault - called on access error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) void arm64_notify_segfault(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) int code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) mmap_read_lock(current->mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) if (find_vma(current->mm, untagged_addr(addr)) == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) code = SEGV_MAPERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) code = SEGV_ACCERR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) mmap_read_unlock(current->mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) force_signal_inject(SIGSEGV, code, addr, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) void do_undefinstr(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) /* check for AArch32 breakpoint instructions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (!aarch32_break_handler(regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (call_undef_hook(regs) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) trace_android_rvh_do_undefinstr(regs, user_mode(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) BUG_ON(!user_mode(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) NOKPROBE_SYMBOL(do_undefinstr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) void do_bti(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) BUG_ON(!user_mode(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) NOKPROBE_SYMBOL(do_bti);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) void do_ptrauth_fault(struct pt_regs *regs, unsigned int esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * Unexpected FPAC exception or pointer authentication failure in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) * the kernel: kill the task before it does any more harm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) trace_android_rvh_do_ptrauth_fault(regs, esr, user_mode(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) BUG_ON(!user_mode(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) force_signal_inject(SIGILL, ILL_ILLOPN, regs->pc, esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) NOKPROBE_SYMBOL(do_ptrauth_fault);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) #define __user_cache_maint(insn, address, res) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (address >= user_addr_max()) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) res = -EFAULT; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) } else { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) uaccess_ttbr0_enable(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) asm volatile ( \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) "1: " insn ", %1\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) " mov %w0, #0\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) "2:\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) " .pushsection .fixup,\"ax\"\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) " .align 2\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) "3: mov %w0, %w2\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) " b 2b\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) " .popsection\n" \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) _ASM_EXTABLE(1b, 3b) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) : "=r" (res) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) : "r" (address), "i" (-EFAULT)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) uaccess_ttbr0_disable(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) static void user_cache_maint_handler(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) unsigned long tagged_address, address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) int rt = ESR_ELx_SYS64_ISS_RT(esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) tagged_address = pt_regs_read_reg(regs, rt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) address = untagged_addr(tagged_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) switch (crm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) case ESR_ELx_SYS64_ISS_CRM_DC_CVAU: /* DC CVAU, gets promoted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) __user_cache_maint("dc civac", address, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) case ESR_ELx_SYS64_ISS_CRM_DC_CVAC: /* DC CVAC, gets promoted */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) __user_cache_maint("dc civac", address, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) case ESR_ELx_SYS64_ISS_CRM_DC_CVADP: /* DC CVADP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) __user_cache_maint("sys 3, c7, c13, 1", address, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) case ESR_ELx_SYS64_ISS_CRM_DC_CVAP: /* DC CVAP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) __user_cache_maint("sys 3, c7, c12, 1", address, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) case ESR_ELx_SYS64_ISS_CRM_DC_CIVAC: /* DC CIVAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) __user_cache_maint("dc civac", address, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) case ESR_ELx_SYS64_ISS_CRM_IC_IVAU: /* IC IVAU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) __user_cache_maint("ic ivau", address, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) arm64_notify_segfault(tagged_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static void ctr_read_handler(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) int rt = ESR_ELx_SYS64_ISS_RT(esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) unsigned long val = arm64_ftr_reg_user_value(&arm64_ftr_reg_ctrel0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* Hide DIC so that we can trap the unnecessary maintenance...*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) val &= ~BIT(CTR_DIC_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) /* ... and fake IminLine to reduce the number of traps. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) val &= ~CTR_IMINLINE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) val |= (PAGE_SHIFT - 2) & CTR_IMINLINE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) pt_regs_write_reg(regs, rt, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) int rt = ESR_ELx_SYS64_ISS_RT(esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) pt_regs_write_reg(regs, rt, arch_timer_read_counter());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) static void cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) int rt = ESR_ELx_SYS64_ISS_RT(esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) pt_regs_write_reg(regs, rt, arch_timer_get_rate());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) static void mrs_handler(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) u32 sysreg, rt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) rt = ESR_ELx_SYS64_ISS_RT(esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) sysreg = esr_sys64_to_sysreg(esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (do_emulate_mrs(regs, sysreg, rt) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) force_signal_inject(SIGILL, ILL_ILLOPC, regs->pc, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static void wfi_handler(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) struct sys64_hook {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) unsigned int esr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) unsigned int esr_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) void (*handler)(unsigned int esr, struct pt_regs *regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) static const struct sys64_hook sys64_hooks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) .esr_mask = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) .esr_val = ESR_ELx_SYS64_ISS_EL0_CACHE_OP_VAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .handler = user_cache_maint_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* Trap read access to CTR_EL0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) .esr_val = ESR_ELx_SYS64_ISS_SYS_CTR_READ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .handler = ctr_read_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* Trap read access to CNTVCT_EL0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTVCT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) .handler = cntvct_read_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) /* Trap read access to CNTFRQ_EL0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .esr_mask = ESR_ELx_SYS64_ISS_SYS_OP_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) .esr_val = ESR_ELx_SYS64_ISS_SYS_CNTFRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .handler = cntfrq_read_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) /* Trap read access to CPUID registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) .esr_mask = ESR_ELx_SYS64_ISS_SYS_MRS_OP_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) .esr_val = ESR_ELx_SYS64_ISS_SYS_MRS_OP_VAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) .handler = mrs_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) /* Trap WFI instructions executed in userspace */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .esr_mask = ESR_ELx_WFx_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .esr_val = ESR_ELx_WFx_WFI_VAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .handler = wfi_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) #ifdef CONFIG_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static bool cp15_cond_valid(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) int cond;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) /* Only a T32 instruction can trap without CV being set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) if (!(esr & ESR_ELx_CV)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) u32 it;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) it = compat_get_it_state(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (!it)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) cond = it >> 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) cond = (esr & ESR_ELx_COND_MASK) >> ESR_ELx_COND_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) return aarch32_opcode_cond_checks[cond](regs->pstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static void compat_cntfrq_read_handler(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) int reg = (esr & ESR_ELx_CP15_32_ISS_RT_MASK) >> ESR_ELx_CP15_32_ISS_RT_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) pt_regs_write_reg(regs, reg, arch_timer_get_rate());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) arm64_skip_faulting_instruction(regs, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static const struct sys64_hook cp15_32_hooks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .esr_mask = ESR_ELx_CP15_32_ISS_SYS_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .esr_val = ESR_ELx_CP15_32_ISS_SYS_CNTFRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) .handler = compat_cntfrq_read_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) static void compat_cntvct_read_handler(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) int rt = (esr & ESR_ELx_CP15_64_ISS_RT_MASK) >> ESR_ELx_CP15_64_ISS_RT_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) int rt2 = (esr & ESR_ELx_CP15_64_ISS_RT2_MASK) >> ESR_ELx_CP15_64_ISS_RT2_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) u64 val = arch_timer_read_counter();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) pt_regs_write_reg(regs, rt, lower_32_bits(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) pt_regs_write_reg(regs, rt2, upper_32_bits(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) arm64_skip_faulting_instruction(regs, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static const struct sys64_hook cp15_64_hooks[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .esr_mask = ESR_ELx_CP15_64_ISS_SYS_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .esr_val = ESR_ELx_CP15_64_ISS_SYS_CNTVCT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .handler = compat_cntvct_read_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) void do_cp15instr(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) const struct sys64_hook *hook, *hook_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (!cp15_cond_valid(esr, regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * There is no T16 variant of a CP access, so we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * always advance PC by 4 bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) arm64_skip_faulting_instruction(regs, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) switch (ESR_ELx_EC(esr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) case ESR_ELx_EC_CP15_32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) hook_base = cp15_32_hooks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) case ESR_ELx_EC_CP15_64:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) hook_base = cp15_64_hooks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) do_undefinstr(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) for (hook = hook_base; hook->handler; hook++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) if ((hook->esr_mask & esr) == hook->esr_val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) hook->handler(esr, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) * New cp15 instructions may previously have been undefined at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) * EL0. Fall back to our usual undefined instruction handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) * so that we handle these consistently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) do_undefinstr(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) NOKPROBE_SYMBOL(do_cp15instr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) void do_sysinstr(unsigned int esr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) const struct sys64_hook *hook;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) for (hook = sys64_hooks; hook->handler; hook++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) if ((hook->esr_mask & esr) == hook->esr_val) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) hook->handler(esr, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) * New SYS instructions may previously have been undefined at EL0. Fall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) * back to our usual undefined instruction handler so that we handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) * these consistently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) do_undefinstr(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) NOKPROBE_SYMBOL(do_sysinstr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) static const char *esr_class_str[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) [0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) [ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) [ESR_ELx_EC_WFx] = "WFI/WFE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) [ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) [ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) [ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) [ESR_ELx_EC_FP_ASIMD] = "ASIMD",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) [ESR_ELx_EC_PAC] = "PAC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) [ESR_ELx_EC_BTI] = "BTI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) [ESR_ELx_EC_ILL] = "PSTATE.IL",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) [ESR_ELx_EC_SVC32] = "SVC (AArch32)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) [ESR_ELx_EC_HVC32] = "HVC (AArch32)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) [ESR_ELx_EC_SMC32] = "SMC (AArch32)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) [ESR_ELx_EC_SVC64] = "SVC (AArch64)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) [ESR_ELx_EC_HVC64] = "HVC (AArch64)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) [ESR_ELx_EC_SMC64] = "SMC (AArch64)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) [ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) [ESR_ELx_EC_SVE] = "SVE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) [ESR_ELx_EC_ERET] = "ERET/ERETAA/ERETAB",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) [ESR_ELx_EC_FPAC] = "FPAC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) [ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) [ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) [ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) [ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) [ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) [ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) [ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) [ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) [ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) [ESR_ELx_EC_SERROR] = "SError",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) [ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) [ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) [ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) [ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) [ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) [ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) [ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) [ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) [ESR_ELx_EC_BRK64] = "BRK (AArch64)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) const char *esr_get_class_string(u32 esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) return esr_class_str[ESR_ELx_EC(esr)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * bad_mode handles the impossible case in the exception vector. This is always
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) * fatal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) asmlinkage void notrace bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) arm64_enter_nmi(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) console_verbose();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) pr_crit("Bad mode in %s handler detected on CPU%d, code 0x%08x -- %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) handler[reason], smp_processor_id(), esr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) esr_get_class_string(esr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) trace_android_rvh_bad_mode(regs, esr, reason);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) __show_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) local_daif_mask();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) panic("bad mode");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * bad_el0_sync handles unexpected, but potentially recoverable synchronous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) * exceptions taken from EL0. Unlike bad_mode, this returns.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) void bad_el0_sync(struct pt_regs *regs, int reason, unsigned int esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) unsigned long pc = instruction_pointer(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) current->thread.fault_address = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) current->thread.fault_code = esr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) arm64_force_sig_fault(SIGILL, ILL_ILLOPC, pc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) "Bad EL0 synchronous exception");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) #ifdef CONFIG_VMAP_STACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) DEFINE_PER_CPU(unsigned long [OVERFLOW_STACK_SIZE/sizeof(long)], overflow_stack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) __aligned(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) asmlinkage void noinstr handle_bad_stack(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) unsigned long tsk_stk = (unsigned long)current->stack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) unsigned long irq_stk = (unsigned long)this_cpu_read(irq_stack_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) unsigned long ovf_stk = (unsigned long)this_cpu_ptr(overflow_stack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) unsigned int esr = read_sysreg(esr_el1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) unsigned long far = read_sysreg(far_el1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) arm64_enter_nmi(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) console_verbose();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) pr_emerg("Insufficient stack space to handle exception!");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) pr_emerg("ESR: 0x%08x -- %s\n", esr, esr_get_class_string(esr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) pr_emerg("FAR: 0x%016lx\n", far);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) pr_emerg("Task stack: [0x%016lx..0x%016lx]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) tsk_stk, tsk_stk + THREAD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) pr_emerg("IRQ stack: [0x%016lx..0x%016lx]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) irq_stk, irq_stk + IRQ_STACK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) pr_emerg("Overflow stack: [0x%016lx..0x%016lx]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) ovf_stk, ovf_stk + OVERFLOW_STACK_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) __show_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) * We use nmi_panic to limit the potential for recusive overflows, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) * to get a better stack trace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) nmi_panic(NULL, "kernel stack overflow");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) cpu_park_loop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) void __noreturn arm64_serror_panic(struct pt_regs *regs, u32 esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) console_verbose();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) pr_crit("SError Interrupt on CPU%d, code 0x%08x -- %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) smp_processor_id(), esr, esr_get_class_string(esr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) trace_android_rvh_arm64_serror_panic(regs, esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) if (regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) __show_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) nmi_panic(regs, "Asynchronous SError Interrupt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) cpu_park_loop();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) unreachable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned int esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) u32 aet = arm64_ras_serror_get_severity(esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) switch (aet) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) case ESR_ELx_AET_CE: /* corrected error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) case ESR_ELx_AET_UEO: /* restartable, not yet consumed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) * The CPU can make progress. We may take UEO again as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) * a more severe error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) case ESR_ELx_AET_UEU: /* Uncorrected Unrecoverable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) case ESR_ELx_AET_UER: /* Uncorrected Recoverable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) * The CPU can't make progress. The exception may have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) * been imprecise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) * Neoverse-N1 #1349291 means a non-KVM SError reported as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) * Unrecoverable should be treated as Uncontainable. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) * call arm64_serror_panic() in both cases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) case ESR_ELx_AET_UC: /* Uncontainable or Uncategorized error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) /* Error has been silently propagated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) arm64_serror_panic(regs, esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) asmlinkage void noinstr do_serror(struct pt_regs *regs, unsigned int esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) arm64_enter_nmi(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) /* non-RAS errors are not containable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(regs, esr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) arm64_serror_panic(regs, esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) arm64_exit_nmi(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) /* GENERIC_BUG traps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) int is_valid_bugaddr(unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) * bug_handler() only called for BRK #BUG_BRK_IMM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) * So the answer is trivial -- any spurious instances with no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) * bug table entry will be rejected by report_bug() and passed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) * back to the debug-monitors code and handled as a fatal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) * unexpected debug exception.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) static int bug_handler(struct pt_regs *regs, unsigned int esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) switch (report_bug(regs->pc, regs)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) case BUG_TRAP_TYPE_BUG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) die("Oops - BUG", regs, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) case BUG_TRAP_TYPE_WARN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) /* unknown/unrecognised bug trap type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) return DBG_HOOK_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) /* If thread survives, skip over the BUG instruction and continue: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) return DBG_HOOK_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) static struct break_hook bug_break_hook = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) .fn = bug_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) .imm = BUG_BRK_IMM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) static int reserved_fault_handler(struct pt_regs *regs, unsigned int esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) pr_err("%s generated an invalid instruction at %pS!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) in_bpf_jit(regs) ? "BPF JIT" : "Kernel text patching",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) (void *)instruction_pointer(regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) /* We cannot handle this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) return DBG_HOOK_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) static struct break_hook fault_break_hook = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) .fn = reserved_fault_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) .imm = FAULT_BRK_IMM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) #ifdef CONFIG_KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) #define KASAN_ESR_RECOVER 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) #define KASAN_ESR_WRITE 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) #define KASAN_ESR_SIZE_MASK 0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) #define KASAN_ESR_SIZE(esr) (1 << ((esr) & KASAN_ESR_SIZE_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) static int kasan_handler(struct pt_regs *regs, unsigned int esr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) bool recover = esr & KASAN_ESR_RECOVER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) bool write = esr & KASAN_ESR_WRITE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) size_t size = KASAN_ESR_SIZE(esr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) u64 addr = regs->regs[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) u64 pc = regs->pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) kasan_report(addr, size, write, pc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) * The instrumentation allows to control whether we can proceed after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) * a crash was detected. This is done by passing the -recover flag to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) * the compiler. Disabling recovery allows to generate more compact
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) * code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) * Unfortunately disabling recovery doesn't work for the kernel right
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) * now. KASAN reporting is disabled in some contexts (for example when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) * the allocator accesses slab object metadata; this is controlled by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) * current->kasan_depth). All these accesses are detected by the tool,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) * even though the reports for them are not printed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) * This is something that might be fixed at some point in the future.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) if (!recover)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) die("Oops - KASAN", regs, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) /* If thread survives, skip over the brk instruction and continue: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) return DBG_HOOK_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) static struct break_hook kasan_break_hook = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) .fn = kasan_handler,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) .imm = KASAN_BRK_IMM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) .mask = KASAN_BRK_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) * Initial handler for AArch64 BRK exceptions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) * This handler only used until debug_traps_init().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) int __init early_brk64(unsigned long addr, unsigned int esr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) #ifdef CONFIG_KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) unsigned int comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) if ((comment & ~KASAN_BRK_MASK) == KASAN_BRK_IMM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) return kasan_handler(regs, esr) != DBG_HOOK_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) return bug_handler(regs, esr) != DBG_HOOK_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) void __init trap_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) register_kernel_break_hook(&bug_break_hook);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) register_kernel_break_hook(&fault_break_hook);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) #ifdef CONFIG_KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) register_kernel_break_hook(&kasan_break_hook);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) debug_traps_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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