^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm64/kernel/probes/simulate-insn.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2013 Linaro Limited.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kprobes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "simulate-insn.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define bbl_displacement(insn) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) sign_extend32(((insn) & 0x3ffffff) << 2, 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define bcond_displacement(insn) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define cbz_displacement(insn) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define tbz_displacement(insn) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) sign_extend32(((insn >> 5) & 0x3fff) << 2, 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ldr_displacement(insn) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) sign_extend32(((insn >> 5) & 0x7ffff) << 2, 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static inline void set_x_reg(struct pt_regs *regs, int reg, u64 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) pt_regs_write_reg(regs, reg, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) static inline void set_w_reg(struct pt_regs *regs, int reg, u64 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) pt_regs_write_reg(regs, reg, lower_32_bits(val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static inline u64 get_x_reg(struct pt_regs *regs, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return pt_regs_read_reg(regs, reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static inline u32 get_w_reg(struct pt_regs *regs, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return lower_32_bits(pt_regs_read_reg(regs, reg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static bool __kprobes check_cbz(u32 opcode, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int xn = opcode & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) return (opcode & (1 << 31)) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) (get_x_reg(regs, xn) == 0) : (get_w_reg(regs, xn) == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static bool __kprobes check_cbnz(u32 opcode, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) int xn = opcode & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return (opcode & (1 << 31)) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) (get_x_reg(regs, xn) != 0) : (get_w_reg(regs, xn) != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static bool __kprobes check_tbz(u32 opcode, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) int xn = opcode & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return ((get_x_reg(regs, xn) >> bit_pos) & 0x1) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static bool __kprobes check_tbnz(u32 opcode, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) int xn = opcode & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int bit_pos = ((opcode & (1 << 31)) >> 26) | ((opcode >> 19) & 0x1f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return ((get_x_reg(regs, xn) >> bit_pos) & 0x1) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * instruction simulation functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) void __kprobes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) simulate_adr_adrp(u32 opcode, long addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) long imm, xn, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) xn = opcode & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) imm = ((opcode >> 3) & 0x1ffffc) | ((opcode >> 29) & 0x3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) imm = sign_extend64(imm, 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (opcode & 0x80000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) val = (imm<<12) + (addr & 0xfffffffffffff000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) val = imm + addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) set_x_reg(regs, xn, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) instruction_pointer_set(regs, instruction_pointer(regs) + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) void __kprobes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) simulate_b_bl(u32 opcode, long addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) int disp = bbl_displacement(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* Link register is x30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (opcode & (1 << 31))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) set_x_reg(regs, 30, addr + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) instruction_pointer_set(regs, addr + disp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void __kprobes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) simulate_b_cond(u32 opcode, long addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int disp = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (aarch32_opcode_cond_checks[opcode & 0xf](regs->pstate & 0xffffffff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) disp = bcond_displacement(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) instruction_pointer_set(regs, addr + disp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) void __kprobes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) simulate_br_blr_ret(u32 opcode, long addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) int xn = (opcode >> 5) & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* update pc first in case we're doing a "blr lr" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) instruction_pointer_set(regs, get_x_reg(regs, xn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /* Link register is x30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (((opcode >> 21) & 0x3) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) set_x_reg(regs, 30, addr + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) void __kprobes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) simulate_cbz_cbnz(u32 opcode, long addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) int disp = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if (opcode & (1 << 24)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (check_cbnz(opcode, regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) disp = cbz_displacement(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if (check_cbz(opcode, regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) disp = cbz_displacement(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) instruction_pointer_set(regs, addr + disp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) void __kprobes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) simulate_tbz_tbnz(u32 opcode, long addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) int disp = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (opcode & (1 << 24)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (check_tbnz(opcode, regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) disp = tbz_displacement(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (check_tbz(opcode, regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) disp = tbz_displacement(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) instruction_pointer_set(regs, addr + disp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) void __kprobes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) simulate_ldr_literal(u32 opcode, long addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) u64 *load_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) int xn = opcode & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) int disp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) disp = ldr_displacement(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) load_addr = (u64 *) (addr + disp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (opcode & (1 << 30)) /* x0-x30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) set_x_reg(regs, xn, *load_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) else /* w0-w30 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) set_w_reg(regs, xn, *load_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) instruction_pointer_set(regs, instruction_pointer(regs) + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) void __kprobes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) simulate_ldrsw_literal(u32 opcode, long addr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) s32 *load_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) int xn = opcode & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) int disp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) disp = ldr_displacement(opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) load_addr = (s32 *) (addr + disp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) set_x_reg(regs, xn, *load_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) instruction_pointer_set(regs, instruction_pointer(regs) + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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