Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Based on arch/arm/include/asm/tlb.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2002 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Copyright (C) 2012 ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #ifndef __ASM_TLB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define __ASM_TLB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/pagemap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/swap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) static inline void __tlb_remove_table(void *_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	free_page_and_swap_cache((struct page *)_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define tlb_flush tlb_flush
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) static void tlb_flush(struct mmu_gather *tlb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm-generic/tlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * get the tlbi levels in arm64.  Default value is 0 if more than one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * of cleared_* is set or neither is set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * Arm64 doesn't support p4ds now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static inline int tlb_get_level(struct mmu_gather *tlb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	/* The TTL field is only valid for the leaf entry. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	if (tlb->freed_tables)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	if (tlb->cleared_ptes && !(tlb->cleared_pmds ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 				   tlb->cleared_puds ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 				   tlb->cleared_p4ds))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 		return 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	if (tlb->cleared_pmds && !(tlb->cleared_ptes ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 				   tlb->cleared_puds ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 				   tlb->cleared_p4ds))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 		return 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	if (tlb->cleared_puds && !(tlb->cleared_ptes ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 				   tlb->cleared_pmds ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 				   tlb->cleared_p4ds))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static inline void tlb_flush(struct mmu_gather *tlb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	bool last_level = !tlb->freed_tables;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	unsigned long stride = tlb_get_unmap_size(tlb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	int tlb_level = tlb_get_level(tlb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	 * If we're tearing down the address space then we only care about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	 * invalidating the walk-cache, since the ASID allocator won't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	 * reallocate our ASID without invalidating the entire TLB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	if (tlb->fullmm) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		if (!last_level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 			flush_tlb_mm(tlb->mm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	__flush_tlb_range(&vma, tlb->start, tlb->end, stride,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 			  last_level, tlb_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 				  unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	pgtable_pte_page_dtor(pte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	tlb_remove_table(tlb, pte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #if CONFIG_PGTABLE_LEVELS > 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 				  unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	struct page *page = virt_to_page(pmdp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	pgtable_pmd_page_dtor(page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	tlb_remove_table(tlb, page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #if CONFIG_PGTABLE_LEVELS > 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 				  unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	tlb_remove_table(tlb, virt_to_page(pudp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #endif