Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Interface for managing mitigations for Spectre vulnerabilities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2020 Google LLC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Author: Will Deacon <will@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #ifndef __ASM_SPECTRE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define __ASM_SPECTRE_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define BP_HARDEN_EL2_SLOTS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #define __BP_HARDEN_HYP_VECS_SZ	((BP_HARDEN_EL2_SLOTS - 1) * SZ_2K)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/cpufeature.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/virt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /* Watch out, ordering is important here. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) enum mitigation_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	SPECTRE_UNAFFECTED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	SPECTRE_MITIGATED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	SPECTRE_VULNERABLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) struct task_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * Note: the order of this enum corresponds to __bp_harden_hyp_vecs and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * we rely on having the direct vectors first.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) enum arm64_hyp_spectre_vector {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	 * Take exceptions directly to __kvm_hyp_vector. This must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	 * 0 so that it used by default when mitigations are not needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	HYP_VECTOR_DIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	 * Bounce via a slot in the hypervisor text mapping of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	 * __bp_harden_hyp_vecs, which contains an SMC call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	HYP_VECTOR_SPECTRE_DIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	 * Bounce via a slot in a special mapping of __bp_harden_hyp_vecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	 * next to the idmap page.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	HYP_VECTOR_INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	 * Bounce via a slot in a special mapping of __bp_harden_hyp_vecs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	 * next to the idmap page, which contains an SMC call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	HYP_VECTOR_SPECTRE_INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) typedef void (*bp_hardening_cb_t)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) struct bp_hardening_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	enum arm64_hyp_spectre_vector	slot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	bp_hardening_cb_t		fn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) DECLARE_PER_CPU_READ_MOSTLY(struct bp_hardening_data, bp_hardening_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) static inline void arm64_apply_bp_hardening(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	struct bp_hardening_data *d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (!cpus_have_const_cap(ARM64_SPECTRE_V2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	d = this_cpu_ptr(&bp_hardening_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	if (d->fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		d->fn();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) enum mitigation_state arm64_get_spectre_v2_state(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) bool has_spectre_v2(const struct arm64_cpu_capabilities *cap, int scope);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) void spectre_v2_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) bool has_spectre_v3a(const struct arm64_cpu_capabilities *cap, int scope);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) void spectre_v3a_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) enum mitigation_state arm64_get_spectre_v4_state(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) bool has_spectre_v4(const struct arm64_cpu_capabilities *cap, int scope);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) void spectre_v4_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) void spectre_v4_enable_task_mitigation(struct task_struct *tsk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) enum mitigation_state arm64_get_meltdown_state(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) enum mitigation_state arm64_get_spectre_bhb_state(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) bool is_spectre_bhb_affected(const struct arm64_cpu_capabilities *entry, int scope);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) u8 spectre_bhb_loop_affected(int scope);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) void spectre_bhb_enable_mitigation(const struct arm64_cpu_capabilities *__unused);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #endif	/* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #endif	/* __ASM_SPECTRE_H */