Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * AArch64 KGDB support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Based on arch/arm/include/kgdb.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2013 Cavium Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Author: Vijaya Kumar K <vijaya.kumar@caviumnetworks.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #ifndef __ARM_KGDB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #define __ARM_KGDB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <asm/debug-monitors.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #ifndef	__ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) static inline void arch_kgdb_breakpoint(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	asm ("brk %0" : : "I" (KGDB_COMPILED_DBG_BRK_IMM));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) extern void kgdb_handle_bus_error(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) extern int kgdb_fault_expected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #endif /* !__ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * gdb remote procotol (well most versions of it) expects the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * register layout.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * General purpose regs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  *     r0-r30: 64 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  *     sp,pc : 64 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  *     pstate  : 32 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  *     Total: 33 + 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * FPU regs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  *     f0-f31: 128 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  *     fpsr & fpcr: 32 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  *     Total: 32 + 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  * To expand a little on the "most versions of it"... when the gdb remote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * protocol for AArch64 was developed it depended on a statement in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  * Architecture Reference Manual that claimed "SPSR_ELx is a 32-bit register".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46)  * and, as a result, allocated only 32-bits for the PSTATE in the remote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * protocol. In fact this statement is still present in ARM DDI 0487A.i.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * Unfortunately "is a 32-bit register" has a very special meaning for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * system registers. It means that "the upper bits, bits[63:32], are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * RES0.". RES0 is heavily used in the ARM architecture documents as a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * way to leave space for future architecture changes. So to translate a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * little for people who don't spend their spare time reading ARM architecture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * manuals, what "is a 32-bit register" actually means in this context is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  * "is a 64-bit register but one with no meaning allocated to any of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * upper 32-bits... *yet*".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * Perhaps then we should not be surprised that this has led to some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  * confusion. Specifically a patch, influenced by the above translation,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  * that extended PSTATE to 64-bit was accepted into gdb-7.7 but the patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61)  * was reverted in gdb-7.8.1 and all later releases, when this was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62)  * discovered to be an undocumented protocol change.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  * So... it is *not* wrong for us to only allocate 32-bits to PSTATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65)  * here even though the kernel itself allocates 64-bits for the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * state. That is because this bit of code tells the kernel how the gdb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  * remote protocol (well most versions of it) describes the register state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * Note that if you are using one of the versions of gdb that supports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  * the gdb-7.7 version of the protocol you cannot use kgdb directly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  * without providing a custom register description (gdb can load new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)  * protocol descriptions at runtime).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define _GP_REGS		33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define _FP_REGS		32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define _EXTRA_REGS		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  * general purpose registers size in bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * pstate is only 4 bytes. subtract 4 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define GP_REG_BYTES		(_GP_REGS * 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define DBG_MAX_REG_NUM		(_GP_REGS + _FP_REGS + _EXTRA_REGS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  * Size of I/O buffer for gdb packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * considering to hold all register contents, size is set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define BUFMAX			2048
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93)  * Number of bytes required for gdb_regs buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94)  * _GP_REGS: 8 bytes, _FP_REGS: 16 bytes and _EXTRA_REGS: 4 bytes each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)  * GDB fails to connect for size beyond this with error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  * "'g' packet reply is too long"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define NUMREGBYTES	((_GP_REGS * 8) + (_FP_REGS * 16) + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 			(_EXTRA_REGS * 4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #endif /* __ASM_KGDB_H */