^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2013 Huawei Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Author: Jiang Liu <liuj97@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2014 Zi Shen Lim <zlim.lnx@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __ASM_INSN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __ASM_INSN_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/build_bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/alternative.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * ARM Architecture Reference Manual for ARMv8 Profile-A, Issue A.a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Section C3.1 "A64 instruction index by encoding":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * AArch64 main encoding table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Bit position
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * 28 27 26 25 Encoding Group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * 0 0 - - Unallocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * 1 0 0 - Data processing, immediate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * 1 0 1 - Branch, exception generation and system instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * - 1 - 0 Loads and stores
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * - 1 0 1 Data processing - register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * 0 1 1 1 Data processing - SIMD and floating point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * 1 1 1 1 Data processing - SIMD and floating point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * "-" means "don't care"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) enum aarch64_insn_encoding_class {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) AARCH64_INSN_CLS_UNKNOWN, /* UNALLOCATED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) AARCH64_INSN_CLS_DP_IMM, /* Data processing - immediate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) AARCH64_INSN_CLS_DP_REG, /* Data processing - register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) AARCH64_INSN_CLS_DP_FPSIMD, /* Data processing - SIMD and FP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) AARCH64_INSN_CLS_LDST, /* Loads and stores */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) AARCH64_INSN_CLS_BR_SYS, /* Branch, exception generation and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * system instructions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) enum aarch64_insn_hint_cr_op {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) AARCH64_INSN_HINT_NOP = 0x0 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) AARCH64_INSN_HINT_YIELD = 0x1 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) AARCH64_INSN_HINT_WFE = 0x2 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) AARCH64_INSN_HINT_WFI = 0x3 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) AARCH64_INSN_HINT_SEV = 0x4 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) AARCH64_INSN_HINT_SEVL = 0x5 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) AARCH64_INSN_HINT_XPACLRI = 0x07 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) AARCH64_INSN_HINT_AUTIB_1716 = 0x0E << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) AARCH64_INSN_HINT_PACIAZ = 0x18 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) AARCH64_INSN_HINT_PACIASP = 0x19 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) AARCH64_INSN_HINT_PACIBZ = 0x1A << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) AARCH64_INSN_HINT_PACIBSP = 0x1B << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) AARCH64_INSN_HINT_AUTIAZ = 0x1C << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) AARCH64_INSN_HINT_AUTIASP = 0x1D << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) AARCH64_INSN_HINT_AUTIBZ = 0x1E << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) AARCH64_INSN_HINT_AUTIBSP = 0x1F << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) AARCH64_INSN_HINT_ESB = 0x10 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) AARCH64_INSN_HINT_PSB = 0x11 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) AARCH64_INSN_HINT_TSB = 0x12 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) AARCH64_INSN_HINT_CSDB = 0x14 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) AARCH64_INSN_HINT_CLEARBHB = 0x16 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) AARCH64_INSN_HINT_BTI = 0x20 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) AARCH64_INSN_HINT_BTIC = 0x22 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) AARCH64_INSN_HINT_BTIJ = 0x24 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) AARCH64_INSN_HINT_BTIJC = 0x26 << 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) enum aarch64_insn_imm_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) AARCH64_INSN_IMM_ADR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) AARCH64_INSN_IMM_26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) AARCH64_INSN_IMM_19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) AARCH64_INSN_IMM_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) AARCH64_INSN_IMM_14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) AARCH64_INSN_IMM_12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) AARCH64_INSN_IMM_9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) AARCH64_INSN_IMM_7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) AARCH64_INSN_IMM_6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) AARCH64_INSN_IMM_S,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) AARCH64_INSN_IMM_R,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) AARCH64_INSN_IMM_N,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) AARCH64_INSN_IMM_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) enum aarch64_insn_register_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) AARCH64_INSN_REGTYPE_RT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) AARCH64_INSN_REGTYPE_RN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) AARCH64_INSN_REGTYPE_RT2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) AARCH64_INSN_REGTYPE_RM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) AARCH64_INSN_REGTYPE_RD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) AARCH64_INSN_REGTYPE_RA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) AARCH64_INSN_REGTYPE_RS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) enum aarch64_insn_register {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) AARCH64_INSN_REG_0 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) AARCH64_INSN_REG_1 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) AARCH64_INSN_REG_2 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) AARCH64_INSN_REG_3 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) AARCH64_INSN_REG_4 = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) AARCH64_INSN_REG_5 = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) AARCH64_INSN_REG_6 = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) AARCH64_INSN_REG_7 = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) AARCH64_INSN_REG_8 = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) AARCH64_INSN_REG_9 = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) AARCH64_INSN_REG_10 = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) AARCH64_INSN_REG_11 = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) AARCH64_INSN_REG_12 = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) AARCH64_INSN_REG_13 = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) AARCH64_INSN_REG_14 = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) AARCH64_INSN_REG_15 = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) AARCH64_INSN_REG_16 = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) AARCH64_INSN_REG_17 = 17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) AARCH64_INSN_REG_18 = 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) AARCH64_INSN_REG_19 = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) AARCH64_INSN_REG_20 = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) AARCH64_INSN_REG_21 = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) AARCH64_INSN_REG_22 = 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) AARCH64_INSN_REG_23 = 23,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) AARCH64_INSN_REG_24 = 24,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) AARCH64_INSN_REG_25 = 25,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) AARCH64_INSN_REG_26 = 26,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) AARCH64_INSN_REG_27 = 27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) AARCH64_INSN_REG_28 = 28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) AARCH64_INSN_REG_29 = 29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) AARCH64_INSN_REG_FP = 29, /* Frame pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) AARCH64_INSN_REG_30 = 30,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) AARCH64_INSN_REG_LR = 30, /* Link register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) AARCH64_INSN_REG_ZR = 31, /* Zero: as source register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) AARCH64_INSN_REG_SP = 31 /* Stack pointer: as load/store base reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) enum aarch64_insn_special_register {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) AARCH64_INSN_SPCLREG_SPSR_EL1 = 0xC200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) AARCH64_INSN_SPCLREG_ELR_EL1 = 0xC201,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) AARCH64_INSN_SPCLREG_SP_EL0 = 0xC208,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) AARCH64_INSN_SPCLREG_SPSEL = 0xC210,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) AARCH64_INSN_SPCLREG_CURRENTEL = 0xC212,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) AARCH64_INSN_SPCLREG_DAIF = 0xDA11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) AARCH64_INSN_SPCLREG_NZCV = 0xDA10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) AARCH64_INSN_SPCLREG_FPCR = 0xDA20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) AARCH64_INSN_SPCLREG_DSPSR_EL0 = 0xDA28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) AARCH64_INSN_SPCLREG_DLR_EL0 = 0xDA29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) AARCH64_INSN_SPCLREG_SPSR_EL2 = 0xE200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) AARCH64_INSN_SPCLREG_ELR_EL2 = 0xE201,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) AARCH64_INSN_SPCLREG_SP_EL1 = 0xE208,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) AARCH64_INSN_SPCLREG_SPSR_INQ = 0xE218,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) AARCH64_INSN_SPCLREG_SPSR_ABT = 0xE219,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) AARCH64_INSN_SPCLREG_SPSR_UND = 0xE21A,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) AARCH64_INSN_SPCLREG_SPSR_FIQ = 0xE21B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) AARCH64_INSN_SPCLREG_SPSR_EL3 = 0xF200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) AARCH64_INSN_SPCLREG_ELR_EL3 = 0xF201,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) AARCH64_INSN_SPCLREG_SP_EL2 = 0xF210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) enum aarch64_insn_variant {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) AARCH64_INSN_VARIANT_32BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) AARCH64_INSN_VARIANT_64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) enum aarch64_insn_condition {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) AARCH64_INSN_COND_EQ = 0x0, /* == */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) AARCH64_INSN_COND_NE = 0x1, /* != */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) AARCH64_INSN_COND_CS = 0x2, /* unsigned >= */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) AARCH64_INSN_COND_CC = 0x3, /* unsigned < */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) AARCH64_INSN_COND_MI = 0x4, /* < 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) AARCH64_INSN_COND_PL = 0x5, /* >= 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) AARCH64_INSN_COND_VS = 0x6, /* overflow */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) AARCH64_INSN_COND_VC = 0x7, /* no overflow */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) AARCH64_INSN_COND_HI = 0x8, /* unsigned > */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) AARCH64_INSN_COND_LS = 0x9, /* unsigned <= */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) AARCH64_INSN_COND_GE = 0xa, /* signed >= */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) AARCH64_INSN_COND_LT = 0xb, /* signed < */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) AARCH64_INSN_COND_GT = 0xc, /* signed > */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) AARCH64_INSN_COND_LE = 0xd, /* signed <= */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) AARCH64_INSN_COND_AL = 0xe, /* always */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) enum aarch64_insn_branch_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) AARCH64_INSN_BRANCH_NOLINK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) AARCH64_INSN_BRANCH_LINK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) AARCH64_INSN_BRANCH_RETURN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) AARCH64_INSN_BRANCH_COMP_ZERO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) AARCH64_INSN_BRANCH_COMP_NONZERO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) enum aarch64_insn_size_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) AARCH64_INSN_SIZE_8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) AARCH64_INSN_SIZE_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) AARCH64_INSN_SIZE_32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) AARCH64_INSN_SIZE_64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) enum aarch64_insn_ldst_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) AARCH64_INSN_LDST_LOAD_REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) AARCH64_INSN_LDST_STORE_REG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) AARCH64_INSN_LDST_LOAD_PAIR_PRE_INDEX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) AARCH64_INSN_LDST_STORE_PAIR_PRE_INDEX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) AARCH64_INSN_LDST_LOAD_PAIR_POST_INDEX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) AARCH64_INSN_LDST_STORE_PAIR_POST_INDEX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) AARCH64_INSN_LDST_LOAD_EX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) AARCH64_INSN_LDST_STORE_EX,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) enum aarch64_insn_adsb_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) AARCH64_INSN_ADSB_ADD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) AARCH64_INSN_ADSB_SUB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) AARCH64_INSN_ADSB_ADD_SETFLAGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) AARCH64_INSN_ADSB_SUB_SETFLAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) enum aarch64_insn_movewide_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) AARCH64_INSN_MOVEWIDE_ZERO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) AARCH64_INSN_MOVEWIDE_KEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) AARCH64_INSN_MOVEWIDE_INVERSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) enum aarch64_insn_bitfield_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) AARCH64_INSN_BITFIELD_MOVE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) AARCH64_INSN_BITFIELD_MOVE_UNSIGNED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) AARCH64_INSN_BITFIELD_MOVE_SIGNED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) enum aarch64_insn_data1_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) AARCH64_INSN_DATA1_REVERSE_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) AARCH64_INSN_DATA1_REVERSE_32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) AARCH64_INSN_DATA1_REVERSE_64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) enum aarch64_insn_data2_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) AARCH64_INSN_DATA2_UDIV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) AARCH64_INSN_DATA2_SDIV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) AARCH64_INSN_DATA2_LSLV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) AARCH64_INSN_DATA2_LSRV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) AARCH64_INSN_DATA2_ASRV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) AARCH64_INSN_DATA2_RORV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) enum aarch64_insn_data3_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) AARCH64_INSN_DATA3_MADD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) AARCH64_INSN_DATA3_MSUB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) enum aarch64_insn_logic_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) AARCH64_INSN_LOGIC_AND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) AARCH64_INSN_LOGIC_BIC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) AARCH64_INSN_LOGIC_ORR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) AARCH64_INSN_LOGIC_ORN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) AARCH64_INSN_LOGIC_EOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) AARCH64_INSN_LOGIC_EON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) AARCH64_INSN_LOGIC_AND_SETFLAGS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) AARCH64_INSN_LOGIC_BIC_SETFLAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) enum aarch64_insn_prfm_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) AARCH64_INSN_PRFM_TYPE_PLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) AARCH64_INSN_PRFM_TYPE_PLI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) AARCH64_INSN_PRFM_TYPE_PST,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) enum aarch64_insn_prfm_target {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) AARCH64_INSN_PRFM_TARGET_L1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) AARCH64_INSN_PRFM_TARGET_L2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) AARCH64_INSN_PRFM_TARGET_L3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) enum aarch64_insn_prfm_policy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) AARCH64_INSN_PRFM_POLICY_KEEP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) AARCH64_INSN_PRFM_POLICY_STRM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) enum aarch64_insn_adr_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) AARCH64_INSN_ADR_TYPE_ADRP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) AARCH64_INSN_ADR_TYPE_ADR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #define __AARCH64_INSN_FUNCS(abbr, mask, val) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) static __always_inline bool aarch64_insn_is_##abbr(u32 code) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) BUILD_BUG_ON(~(mask) & (val)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return (code & (mask)) == (val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) } \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) static __always_inline u32 aarch64_insn_get_##abbr##_value(void) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return (val); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) __AARCH64_INSN_FUNCS(adr, 0x9F000000, 0x10000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) __AARCH64_INSN_FUNCS(adrp, 0x9F000000, 0x90000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) __AARCH64_INSN_FUNCS(prfm, 0x3FC00000, 0x39800000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) __AARCH64_INSN_FUNCS(prfm_lit, 0xFF000000, 0xD8000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) __AARCH64_INSN_FUNCS(str_reg, 0x3FE0EC00, 0x38206800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) __AARCH64_INSN_FUNCS(ldadd, 0x3F20FC00, 0x38200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) __AARCH64_INSN_FUNCS(ldr_reg, 0x3FE0EC00, 0x38606800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) __AARCH64_INSN_FUNCS(ldr_lit, 0xBF000000, 0x18000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) __AARCH64_INSN_FUNCS(ldrsw_lit, 0xFF000000, 0x98000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) __AARCH64_INSN_FUNCS(exclusive, 0x3F800000, 0x08000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) __AARCH64_INSN_FUNCS(load_ex, 0x3F400000, 0x08400000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) __AARCH64_INSN_FUNCS(store_ex, 0x3F400000, 0x08000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) __AARCH64_INSN_FUNCS(stp_post, 0x7FC00000, 0x28800000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) __AARCH64_INSN_FUNCS(ldp_post, 0x7FC00000, 0x28C00000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) __AARCH64_INSN_FUNCS(stp_pre, 0x7FC00000, 0x29800000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) __AARCH64_INSN_FUNCS(ldp_pre, 0x7FC00000, 0x29C00000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) __AARCH64_INSN_FUNCS(add_imm, 0x7F000000, 0x11000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) __AARCH64_INSN_FUNCS(adds_imm, 0x7F000000, 0x31000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) __AARCH64_INSN_FUNCS(sub_imm, 0x7F000000, 0x51000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) __AARCH64_INSN_FUNCS(subs_imm, 0x7F000000, 0x71000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) __AARCH64_INSN_FUNCS(movn, 0x7F800000, 0x12800000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) __AARCH64_INSN_FUNCS(sbfm, 0x7F800000, 0x13000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) __AARCH64_INSN_FUNCS(bfm, 0x7F800000, 0x33000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) __AARCH64_INSN_FUNCS(movz, 0x7F800000, 0x52800000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) __AARCH64_INSN_FUNCS(ubfm, 0x7F800000, 0x53000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) __AARCH64_INSN_FUNCS(movk, 0x7F800000, 0x72800000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) __AARCH64_INSN_FUNCS(add, 0x7F200000, 0x0B000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) __AARCH64_INSN_FUNCS(adds, 0x7F200000, 0x2B000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) __AARCH64_INSN_FUNCS(sub, 0x7F200000, 0x4B000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) __AARCH64_INSN_FUNCS(subs, 0x7F200000, 0x6B000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) __AARCH64_INSN_FUNCS(madd, 0x7FE08000, 0x1B000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) __AARCH64_INSN_FUNCS(msub, 0x7FE08000, 0x1B008000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) __AARCH64_INSN_FUNCS(udiv, 0x7FE0FC00, 0x1AC00800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) __AARCH64_INSN_FUNCS(sdiv, 0x7FE0FC00, 0x1AC00C00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) __AARCH64_INSN_FUNCS(lslv, 0x7FE0FC00, 0x1AC02000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) __AARCH64_INSN_FUNCS(lsrv, 0x7FE0FC00, 0x1AC02400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) __AARCH64_INSN_FUNCS(asrv, 0x7FE0FC00, 0x1AC02800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) __AARCH64_INSN_FUNCS(rorv, 0x7FE0FC00, 0x1AC02C00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) __AARCH64_INSN_FUNCS(rev16, 0x7FFFFC00, 0x5AC00400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) __AARCH64_INSN_FUNCS(rev32, 0x7FFFFC00, 0x5AC00800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) __AARCH64_INSN_FUNCS(rev64, 0x7FFFFC00, 0x5AC00C00)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) __AARCH64_INSN_FUNCS(and, 0x7F200000, 0x0A000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) __AARCH64_INSN_FUNCS(bic, 0x7F200000, 0x0A200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) __AARCH64_INSN_FUNCS(orr, 0x7F200000, 0x2A000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) __AARCH64_INSN_FUNCS(orn, 0x7F200000, 0x2A200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) __AARCH64_INSN_FUNCS(eor, 0x7F200000, 0x4A000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) __AARCH64_INSN_FUNCS(eon, 0x7F200000, 0x4A200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) __AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) __AARCH64_INSN_FUNCS(and_imm, 0x7F800000, 0x12000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) __AARCH64_INSN_FUNCS(orr_imm, 0x7F800000, 0x32000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) __AARCH64_INSN_FUNCS(eor_imm, 0x7F800000, 0x52000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) __AARCH64_INSN_FUNCS(ands_imm, 0x7F800000, 0x72000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) __AARCH64_INSN_FUNCS(extr, 0x7FA00000, 0x13800000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) __AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) __AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) __AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) __AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) __AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) __AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) __AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) __AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) __AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) __AARCH64_INSN_FUNCS(smc, 0xFFE0001F, 0xD4000003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) __AARCH64_INSN_FUNCS(brk, 0xFFE0001F, 0xD4200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) __AARCH64_INSN_FUNCS(exception, 0xFF000000, 0xD4000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) __AARCH64_INSN_FUNCS(hint, 0xFFFFF01F, 0xD503201F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) __AARCH64_INSN_FUNCS(br, 0xFFFFFC1F, 0xD61F0000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) __AARCH64_INSN_FUNCS(br_auth, 0xFEFFF800, 0xD61F0800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) __AARCH64_INSN_FUNCS(blr, 0xFFFFFC1F, 0xD63F0000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) __AARCH64_INSN_FUNCS(blr_auth, 0xFEFFF800, 0xD63F0800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) __AARCH64_INSN_FUNCS(ret, 0xFFFFFC1F, 0xD65F0000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) __AARCH64_INSN_FUNCS(ret_auth, 0xFFFFFBFF, 0xD65F0BFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) __AARCH64_INSN_FUNCS(eret, 0xFFFFFFFF, 0xD69F03E0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) __AARCH64_INSN_FUNCS(eret_auth, 0xFFFFFBFF, 0xD69F0BFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) __AARCH64_INSN_FUNCS(mrs, 0xFFF00000, 0xD5300000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) __AARCH64_INSN_FUNCS(msr_imm, 0xFFF8F01F, 0xD500401F)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) __AARCH64_INSN_FUNCS(msr_reg, 0xFFF00000, 0xD5100000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #undef __AARCH64_INSN_FUNCS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) bool aarch64_insn_is_steppable_hint(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) bool aarch64_insn_is_branch_imm(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static inline bool aarch64_insn_is_adr_adrp(u32 insn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return aarch64_insn_is_adr(insn) || aarch64_insn_is_adrp(insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) int aarch64_insn_read(void *addr, u32 *insnp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) int aarch64_insn_write(void *addr, u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) bool aarch64_insn_uses_literal(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) bool aarch64_insn_is_branch(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) u64 aarch64_insn_decode_immediate(enum aarch64_insn_imm_type type, u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) u32 insn, u64 imm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) u32 aarch64_insn_decode_register(enum aarch64_insn_register_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) u32 aarch64_insn_gen_branch_imm(unsigned long pc, unsigned long addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) enum aarch64_insn_branch_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) u32 aarch64_insn_gen_comp_branch_imm(unsigned long pc, unsigned long addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) enum aarch64_insn_register reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) enum aarch64_insn_branch_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u32 aarch64_insn_gen_cond_branch_imm(unsigned long pc, unsigned long addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) enum aarch64_insn_condition cond);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) u32 aarch64_insn_gen_hint(enum aarch64_insn_hint_cr_op op);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u32 aarch64_insn_gen_nop(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) u32 aarch64_insn_gen_branch_reg(enum aarch64_insn_register reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) enum aarch64_insn_branch_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) u32 aarch64_insn_gen_load_store_reg(enum aarch64_insn_register reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) enum aarch64_insn_register base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) enum aarch64_insn_register offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) enum aarch64_insn_size_type size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) enum aarch64_insn_ldst_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) u32 aarch64_insn_gen_load_store_pair(enum aarch64_insn_register reg1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) enum aarch64_insn_register reg2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) enum aarch64_insn_register base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) int offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) enum aarch64_insn_ldst_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) u32 aarch64_insn_gen_load_store_ex(enum aarch64_insn_register reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) enum aarch64_insn_register base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) enum aarch64_insn_register state,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) enum aarch64_insn_size_type size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) enum aarch64_insn_ldst_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) u32 aarch64_insn_gen_ldadd(enum aarch64_insn_register result,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) enum aarch64_insn_register address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) enum aarch64_insn_register value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) enum aarch64_insn_size_type size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) u32 aarch64_insn_gen_stadd(enum aarch64_insn_register address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) enum aarch64_insn_register value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) enum aarch64_insn_size_type size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) u32 aarch64_insn_gen_add_sub_imm(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) enum aarch64_insn_register src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) int imm, enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) enum aarch64_insn_adsb_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) u32 aarch64_insn_gen_adr(unsigned long pc, unsigned long addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) enum aarch64_insn_register reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) enum aarch64_insn_adr_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) u32 aarch64_insn_gen_bitfield(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) enum aarch64_insn_register src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) int immr, int imms,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) enum aarch64_insn_bitfield_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) u32 aarch64_insn_gen_movewide(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) int imm, int shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) enum aarch64_insn_movewide_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u32 aarch64_insn_gen_add_sub_shifted_reg(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) enum aarch64_insn_register src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) enum aarch64_insn_register reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) int shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) enum aarch64_insn_adsb_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) u32 aarch64_insn_gen_data1(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) enum aarch64_insn_register src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) enum aarch64_insn_data1_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) u32 aarch64_insn_gen_data2(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) enum aarch64_insn_register src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) enum aarch64_insn_register reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) enum aarch64_insn_data2_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) u32 aarch64_insn_gen_data3(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) enum aarch64_insn_register src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) enum aarch64_insn_register reg1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) enum aarch64_insn_register reg2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) enum aarch64_insn_data3_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) u32 aarch64_insn_gen_logical_shifted_reg(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) enum aarch64_insn_register src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) enum aarch64_insn_register reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) int shift,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) enum aarch64_insn_logic_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) u32 aarch64_insn_gen_move_reg(enum aarch64_insn_register dst,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) enum aarch64_insn_register src,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) enum aarch64_insn_variant variant);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) u32 aarch64_insn_gen_logical_immediate(enum aarch64_insn_logic_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) enum aarch64_insn_register Rn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) enum aarch64_insn_register Rd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) u64 imm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) u32 aarch64_insn_gen_extr(enum aarch64_insn_variant variant,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) enum aarch64_insn_register Rm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) enum aarch64_insn_register Rn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) enum aarch64_insn_register Rd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) u8 lsb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) u32 aarch64_insn_gen_prefetch(enum aarch64_insn_register base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) enum aarch64_insn_prfm_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) enum aarch64_insn_prfm_target target,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) enum aarch64_insn_prfm_policy policy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) s32 aarch64_get_branch_offset(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) u32 aarch64_set_branch_offset(u32 insn, s32 offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) int aarch64_insn_patch_text_nosync(void *addr, u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) int aarch64_insn_patch_text(void *addrs[], u32 insns[], int cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) s32 aarch64_insn_adrp_get_offset(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) u32 aarch64_insn_adrp_set_offset(u32 insn, s32 offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) bool aarch32_insn_is_wide(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) #define A32_RN_OFFSET 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) #define A32_RT_OFFSET 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #define A32_RT2_OFFSET 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) u32 aarch64_insn_extract_system_reg(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) u32 aarch32_insn_extract_reg_num(u32 insn, int offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) u32 aarch32_insn_mcr_extract_opc2(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) u32 aarch32_insn_mcr_extract_crm(u32 insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) typedef bool (pstate_check_t)(unsigned long);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) extern pstate_check_t * const aarch32_opcode_cond_checks[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) #endif /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) #endif /* __ASM_INSN_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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