^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2014 ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #ifndef __ASM_CPU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define __ASM_CPU_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Records attributes of an individual CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct cpuinfo_32bit {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) u32 reg_id_dfr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) u32 reg_id_dfr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) u32 reg_id_isar0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) u32 reg_id_isar1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) u32 reg_id_isar2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) u32 reg_id_isar3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) u32 reg_id_isar4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u32 reg_id_isar5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u32 reg_id_isar6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) u32 reg_id_mmfr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u32 reg_id_mmfr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u32 reg_id_mmfr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u32 reg_id_mmfr3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u32 reg_id_mmfr4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u32 reg_id_mmfr5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u32 reg_id_pfr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u32 reg_id_pfr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 reg_id_pfr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u32 reg_mvfr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u32 reg_mvfr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u32 reg_mvfr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct cpuinfo_arm64 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct cpu cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct kobject kobj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 reg_ctr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u32 reg_cntfrq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u32 reg_dczid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 reg_midr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u32 reg_revidr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u64 reg_id_aa64dfr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u64 reg_id_aa64dfr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u64 reg_id_aa64isar0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u64 reg_id_aa64isar1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u64 reg_id_aa64isar2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u64 reg_id_aa64mmfr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u64 reg_id_aa64mmfr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u64 reg_id_aa64mmfr2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u64 reg_id_aa64pfr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u64 reg_id_aa64pfr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u64 reg_id_aa64zfr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct cpuinfo_32bit aarch32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* pseudo-ZCR for recording maximum ZCR_EL1 LEN value: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u64 reg_zcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) DECLARE_PER_CPU(struct cpuinfo_arm64, cpu_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void cpuinfo_store_cpu(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) void __init cpuinfo_store_boot_cpu(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) void __init init_cpu_features(struct cpuinfo_arm64 *info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) void update_cpu_features(int cpu, struct cpuinfo_arm64 *info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct cpuinfo_arm64 *boot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif /* __ASM_CPU_H */