Orange Pi5 kernel

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
 *
 */

/dts-v1/;

#include "rk3588s-orangepi-5.dtsi"
#include "rk3588-linux.dtsi"
#include "rk3588s-orangepi-5-lcd.dtsi"

#include "rk3588s-orangepi-5-camera1.dtsi"
#include "rk3588s-orangepi-5-camera2.dtsi"
#include "rk3588s-orangepi-5-camera3.dtsi"

/ {
	model = "Orange Pi 5";
	compatible = "rockchip,rk3588s-orangepi-5", "rockchip,rk3588";

	vcc_3v3_sd_s0: vcc-3v3-sd-s0 {
		compatible = "regulator-fixed";
		regulator-name = "vcc_3v3_sd_s0";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>;
		enable-active-low;
		vin-supply = <&vcc_3v3_s3>;
		regulator-state-mem {
			regulator-off-in-suspend;
		};
	};

	vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
		compatible = "regulator-fixed";
		regulator-name = "vcc_1v1_nldo_s3";
		regulator-always-on;
		regulator-boot-on;
		regulator-min-microvolt = <1100000>;
		regulator-max-microvolt = <1100000>;
		vin-supply = <&vcc5v0_sys>;
	};

	leds: gpio-leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 =<&leds_gpio>;
		status = "okay";

		led@1 {
			gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
			label = "status_led";
			linux,default-trigger = "heartbeat";
			linux,default-trigger-delay-ms = <0>;
		};
	};
};

&gmac1 {
	/* Use rgmii-rxid mode to disable rx delay inside Soc */
	phy-mode = "rgmii-rxid";
	clock_in_out = "output";

	snps,reset-gpio = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
	snps,reset-active-low;
	/* Reset time is 20ms, 100ms for rtl8211f */
	snps,reset-delays-us = <0 20000 100000>;

	pinctrl-names = "default";
	pinctrl-0 = <&gmac1_miim
	             &gmac1_tx_bus2
	             &gmac1_rx_bus2
	             &gmac1_rgmii_clk
	             &gmac1_rgmii_bus>;

	tx_delay = <0x42>;
	/* rx_delay = <0x3f>; */

	phy-handle = <&rgmii_phy1>;
	status = "okay";
};

&mdio1 {
	rgmii_phy1: phy@1 {
		compatible = "ethernet-phy-ieee802.3-c22";
		reg = <0x1>;
	};
};

&hdmi0 {
	enable-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
	cec-enable;
	status = "okay";
};

&hdmi0_in_vp0 {
	status = "okay";
};

&hdmi0_sound {
	status = "okay";
};

&hdptxphy_hdmi0 {
	status = "okay";
};

&route_hdmi0{
	status = "okay";
};

&i2s5_8ch {
	status = "okay";
};

&i2s1_8ch {
	status = "okay";
	rockchip,i2s-tx-route = <3 2 1 0>;
	rockchip,i2s-rx-route = <1 3 2 0>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2s1m0_sclk
	             &i2s1m0_lrck
	             &i2s1m0_sdi1
	             &i2s1m0_sdo3>;
};

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0m2_xfer>;

	vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 {
		compatible = "rockchip,rk8602";
		reg = <0x42>;
		vin-supply = <&vcc5v0_sys>;
		regulator-compatible = "rk860x-reg";
		regulator-name = "vdd_cpu_big0_s0";
		regulator-min-microvolt = <550000>;
		regulator-max-microvolt = <1050000>;
		regulator-ramp-delay = <2300>;
		rockchip,suspend-voltage-selector = <1>;
		regulator-boot-on;
		regulator-always-on;
		regulator-state-mem {
			regulator-off-in-suspend;
		};
	};

	vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 {
		compatible = "rockchip,rk8603";
		reg = <0x43>;
		vin-supply = <&vcc5v0_sys>;
		regulator-compatible = "rk860x-reg";
		regulator-name = "vdd_cpu_big1_s0";
		regulator-min-microvolt = <550000>;
		regulator-max-microvolt = <1050000>;
		regulator-ramp-delay = <2300>;
		rockchip,suspend-voltage-selector = <1>;
		regulator-boot-on;
		regulator-always-on;
		regulator-state-mem {
			regulator-off-in-suspend;
		};
	};
};

&i2c2 {
	status = "okay";

	vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 {
		compatible = "rockchip,rk8602";
		reg = <0x42>;
		vin-supply = <&vcc5v0_sys>;
		regulator-compatible = "rk860x-reg";
		regulator-name = "vdd_npu_s0";
		regulator-min-microvolt = <550000>;
		regulator-max-microvolt = <950000>;
		regulator-ramp-delay = <2300>;
		rockchip,suspend-voltage-selector = <1>;
		regulator-boot-on;
		regulator-always-on;
		regulator-state-mem {
			regulator-off-in-suspend;
		};
	};
};

/*
   pin3: GPIO1_B7
   pin5: GPIO1_B6
*/
&i2c5 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c5m3_xfer>;
};

&uart1 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&uart1m1_xfer>;
};

&pwm13 {
	status = "disabled";
	pinctrl-names = "active";
	pinctrl-0 = <&pwm13m2_pins>;
};

/*
   pin7: GPIO1_C6
*/
&pwm15 {
	status = "disabled";
	pinctrl-names = "active";
	pinctrl-0 = <&pwm15m2_pins>;
};

/*
   pin11: GPIO4_B2
   pin13: GPIO4_B3
*/
&pwm14 {
	status = "disabled";
	pinctrl-names = "active";
	pinctrl-0 = <&pwm14m1_pins>;
};

&can1 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&can1m1_pins>;
	assigned-clocks = <&cru CLK_CAN1>;
	assigned-clock-rates = <200000000>;
};

/*
   pin15: GPIO0_D4
   pin12: GPIO0_D5
*/
&can2 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&can2m1_pins>;
	assigned-clocks = <&cru CLK_CAN2>;
	assigned-clock-rates = <200000000>;
};

/*
   pin19: GPIO1_C1
   pin21: GPIO1_C0
   pin23: GPIO1_C2
   pin24: GPIO1_C4
*/
&spi4 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&spi4m0_cs1 &spi4m0_pins>;
	assigned-clocks = <&cru CLK_SPI4>;
	assigned-clock-rates = <200000000>;
	num-cs = <2>;

	spi_dev@1 {
		compatible = "rockchip,spidev";
		reg = <1>;
		spi-max-frequency = <50000000>;
	};
};

&i2c3 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3m0_xfer>;
};

&uart3 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&uart3m0_xfer>;
};

&pwm3 {
	status = "disabled";
	pinctrl-names = "active";
	pinctrl-0 = <&pwm3m2_pins>;
	//pinctrl-0 = <&pwm3m0_pins>;
};

/*
   pin8:  GPIO4_A3
   pin10: GPIO4_A4
*/
&uart0 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&uart0m2_xfer>;
};

/*
   pin16: GPIO1_D3
   pin18: GPIO1_D2
*/
&uart4 {
	status = "disabled";
	pinctrl-names = "default";
	pinctrl-0 = <&uart4m0_xfer>;
};

&i2c1 {
	status = "disabled";
	pinctrl-names = "default";
	//pinctrl-0 = <&i2c1m4_xfer>;
	pinctrl-0 = <&i2c1m2_xfer>;
};

&pwm0 {
	status = "disabled";
	pinctrl-names = "active";
	pinctrl-0 = <&pwm0m1_pins>;
};

/*
   pin26: GPIO1_A3
*/
&pwm1 {
	status = "disabled";
	pinctrl-names = "active";
	//pinctrl-0 = <&pwm1m2_pins>;
	pinctrl-0 = <&pwm1m1_pins>;
};

/* watchdog */
&wdt {
	status = "okay";
};

&sfc {
	status = "disabled";
};

&mipi_dcphy0 {
	status = "okay";
};

&mipi_dcphy1 {
	status = "okay";
};

&rkcif {
	status = "okay";
};

&rkcif_mmu {
	status = "okay";
};

&rkisp0 {
	status = "okay";
};

&isp0_mmu {
	status = "okay";
};

&rkisp1 {
	status = "okay";
};

&isp1_mmu {
	status = "okay";
};

&pcie2x1l2 {
	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
	rockchip,skip-scan-in-resume;
	status = "okay";
};

&wireless_bluetooth {
	BT,reset_gpio    = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
	BT,wake_gpio     = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
	BT,wake_host_irq = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&wireless_wlan {
	WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
	WIFI,poweren_gpio = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&pinctrl
{
	wireless-bluetooth {
		uart9_gpios: uart9-gpios {
			rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
		};

		bt_gpio: bt-gpio {
			rockchip,pins =
				<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
				<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>,
				<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};

	gpio-func {
		leds_gpio: leds-gpio {
			rockchip,pins =
				<1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

&sdhci {
	status = "okay";
};