Orange Pi5 kernel

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
 */

/dts-v1/;
#include <dt-bindings/clock/rk618-cru.h>
#include <dt-bindings/display/media-bus-format.h>
#include "px30-evb-ddr3-v10.dtsi"
#include "px30-android.dtsi"

&dsi {
	status = "okay";

	panel@0 {
		compatible = "sitronix,st7703", "simple-panel-dsi";
		reg = <0>;
		power-supply = <&vcc3v3_lcd>;
		backlight = <&backlight>;
		prepare-delay-ms = <2>;
		reset-delay-ms = <1>;
		init-delay-ms = <20>;
		enable-delay-ms = <120>;
		disable-delay-ms = <50>;
		unprepare-delay-ms = <20>;

		width-mm = <68>;
		height-mm = <121>;

		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
		dsi,format = <MIPI_DSI_FMT_RGB888>;
		dsi,lanes = <4>;

		panel-init-sequence = [
			05 fa 01 11
			39 00 04 b9 f1 12 83
			39 00 1c ba 33 81 05 f9 0e 0e 00 00 00
				 00 00 00 00 00 44 25 00 91 0a
				 00 00 02 4f 01 00 00 37
			15 00 02 b8 25
			39 00 04 bf 02 11 00
			39 00 0b b3 0c 10 0a 50 03 ff 00 00 00
				 00
			39 00 0a c0 73 73 50 50 00 00 08 70 00
			15 00 02 bc 46
			15 00 02 cc 0b
			15 00 02 b4 80
			39 00 04 b2 c8 12 30
			39 00 0f e3 07 07 0b 0b 03 0b 00 00 00
				 00 ff 00 c0 10
			39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67
				 77 33 33
			39 00 07 c6 00 00 ff ff 01 ff
			39 00 03 b5 09 09
			39 00 03 b6 87 95
			39 00 40 e9 c2 10 05 05 10 05 a0 12 31
				 23 3f 81 0a a0 37 18 00 80 01
				 00 00 00 00 80 01 00 00 00 48
				 f8 86 42 08 88 88 80 88 88 88
				 58 f8 87 53 18 88 88 81 88 88
				 88 00 00 00 01 00 00 00 00 00
				 00 00 00 00
			39 00 3e ea 00 1a 00 00 00 00 02 00 00
				 00 00 00 1f 88 81 35 78 88 88
				 85 88 88 88 0f 88 80 24 68 88
				 88 84 88 88 88 23 10 00 00 1c
				 00 00 00 00 00 00 00 00 00 00
				 00 00 00 00 00 30 05 a0 00 00
				 00 00
			39 00 23 e0 00 06 08 2a 31 3f 38 36 07
				 0c 0d 11 13 12 13 11 18 00 06
				 08 2a 31 3f 38 36 07 0c 0d 11
				 13 12 13 11 18
			05 32 01 29
		];

		panel-exit-sequence = [
			05 00 01 28
			05 00 01 10
		];

		display-timings {
			native-mode = <&timing0>;

			timing0: timing0 {
				clock-frequency = <64000000>;
				hactive = <720>;
				vactive = <1280>;
				hfront-porch = <40>;
				hsync-len = <10>;
				hback-porch = <40>;
				vfront-porch = <22>;
				vsync-len = <4>;
				vback-porch = <11>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;
			};
		};
	};
};

&dmc {
	auto-freq-en = <0>;
};

&vcc3v0_pmu {
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;

	regulator-state-mem {
		regulator-suspend-microvolt = <3300000>;
	};
};

&i2c1 {

	rk618@50 {
		compatible = "rockchip,rk618";
		reg = <0x50>;
		pinctrl-names = "default";
		pinctrl-0 = <&i2s1_2ch_mclk>;
		clocks = <&cru SCLK_I2S1_OUT>;
		clock-names = "clkin";
		assigned-clocks = <&cru SCLK_I2S1_OUT>;
		assigned-clock-rates = <11289600>;
		reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
		status = "okay";

		clock: cru {
			compatible = "rockchip,rk618-cru";
			clocks = <&cru SCLK_I2S1_OUT>, <&cru DCLK_VOPL>;
			clock-names = "clkin", "lcdc0_dclkp";
			assigned-clocks = <&clock SCALER_PLLIN_CLK>,
					  <&clock VIF_PLLIN_CLK>,
					  <&clock SCALER_CLK>,
					  <&clock VIF0_PRE_CLK>,
					  <&clock CODEC_CLK>,
					  <&clock DITHER_CLK>;
			assigned-clock-parents = <&cru SCLK_I2S1_OUT>,
						 <&clock LCDC0_CLK>,
						 <&clock SCALER_PLL_CLK>,
						 <&clock VIF_PLL_CLK>,
						 <&cru SCLK_I2S1_OUT>,
						 <&clock VIF0_CLK>;
			#clock-cells = <1>;
			status = "okay";
		};

		hdmi {
			compatible = "rockchip,rk618-hdmi";
			clocks = <&clock HDMI_CLK>;
			clock-names = "hdmi";
			assigned-clocks = <&clock HDMI_CLK>;
			assigned-clock-parents = <&clock VIF0_CLK>;
			interrupt-parent = <&gpio2>;
			interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
			status = "okay";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;

					hdmi_in_rgb: endpoint {
						remote-endpoint = <&rgb_out_hdmi>;
					};
				};
			};
		};
	};
};

&rgb {
	status = "okay";

	ports {
		port@1 {
			reg = <1>;

			rgb_out_hdmi: endpoint {
				remote-endpoint = <&hdmi_in_rgb>;
			};
		};
	};
};

&rgb_in_vopb {
	status = "disabled";
};

&rgb_in_vopl {
	status = "okay";
};

&route_rgb {
	connect = <&vopl_out_rgb>;
	status = "disabled";
};