^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) config ARM64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) select ACPI_CCA_REQUIRED if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) select ACPI_GENERIC_GSI if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) select ACPI_GTDT if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) select ACPI_IORT if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) select ACPI_REDUCED_HARDWARE_ONLY if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) select ACPI_MCFG if (ACPI && PCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) select ACPI_SPCR_TABLE if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) select ACPI_PPTT if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) select ARCH_HAS_DEBUG_WX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) select ARCH_BINFMT_ELF_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) select ARCH_HAS_DEBUG_VIRTUAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) select ARCH_HAS_DEBUG_VM_PGTABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) select ARCH_HAS_DEVMEM_IS_ALLOWED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) select ARCH_HAS_DMA_PREP_COHERENT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) select ARCH_HAS_FAST_MULTIPLIER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) select ARCH_HAS_FORTIFY_SOURCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) select ARCH_HAS_GCOV_PROFILE_ALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) select ARCH_HAS_GIGANTIC_PAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) select ARCH_HAS_KCOV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) select ARCH_HAS_KEEPINITRD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) select ARCH_HAS_MEMBARRIER_SYNC_CORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) select ARCH_HAS_PTE_DEVMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) select ARCH_HAS_PTE_SPECIAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) select ARCH_HAS_SETUP_DMA_OPS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) select ARCH_HAS_SET_DIRECT_MAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) select ARCH_HAS_SET_MEMORY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) select ARCH_STACKWALK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) select ARCH_HAS_STRICT_KERNEL_RWX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) select ARCH_HAS_STRICT_MODULE_RWX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) select ARCH_HAS_SYNC_DMA_FOR_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) select ARCH_HAS_SYNC_DMA_FOR_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) select ARCH_HAS_SYSCALL_WRAPPER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) select ARCH_HAS_TEARDOWN_DMA_OPS if IOMMU_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) select ARCH_HAVE_ELF_PROT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) select ARCH_HAVE_NMI_SAFE_CMPXCHG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) select ARCH_INLINE_READ_LOCK if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) select ARCH_KEEP_MEMBLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) select ARCH_USE_CMPXCHG_LOCKREF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) select ARCH_USE_GNU_PROPERTY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) select ARCH_USE_QUEUED_RWLOCKS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) select ARCH_USE_QUEUED_SPINLOCKS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) select ARCH_USE_SYM_ANNOTATIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) select ARCH_SUPPORTS_MEMORY_FAILURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) select ARCH_SUPPORTS_SHADOW_CALL_STACK if CC_HAVE_SHADOW_CALL_STACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) select ARCH_SUPPORTS_LTO_CLANG if CPU_LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) select ARCH_SUPPORTS_LTO_CLANG_THIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) select ARCH_SUPPORTS_ATOMIC_RMW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) select ARCH_SUPPORTS_INT128 if CC_HAS_INT128 && (GCC_VERSION >= 50000 || CC_IS_CLANG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) select ARCH_SUPPORTS_NUMA_BALANCING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) select ARCH_WANT_COMPAT_IPC_PARSE_VERSION if COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) select ARCH_WANT_DEFAULT_BPF_JIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) select ARCH_WANT_FRAME_POINTERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) select ARCH_WANT_HUGE_PMD_SHARE if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) select ARCH_WANT_LD_ORPHAN_WARN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) select ARCH_HAS_UBSAN_SANITIZE_ALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) select ARM_AMBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) select ARM_ARCH_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) select ARM_GIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) select AUDIT_ARCH_COMPAT_GENERIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) select ARM_GIC_V2M if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) select ARM_GIC_V3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) select ARM_GIC_V3_ITS if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) select ARM_PSCI_FW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) select BUILDTIME_TABLE_SORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) select CLONE_BACKWARDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) select COMMON_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) select CPU_PM if (SUSPEND || CPU_IDLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) select CRC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) select DCACHE_WORD_ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) select DMA_DIRECT_REMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) select EDAC_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) select FRAME_POINTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) select GENERIC_ALLOCATOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) select GENERIC_ARCH_TOPOLOGY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) select GENERIC_CLOCKEVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) select GENERIC_CLOCKEVENTS_BROADCAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) select GENERIC_CPU_AUTOPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) select GENERIC_CPU_VULNERABILITIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) select GENERIC_EARLY_IOREMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) select GENERIC_IDLE_POLL_SETUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) select GENERIC_IRQ_IPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) select ARCH_WANTS_IRQ_RAW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) select GENERIC_IRQ_MULTI_HANDLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) select GENERIC_IRQ_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) select GENERIC_IRQ_SHOW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) select GENERIC_IRQ_SHOW_LEVEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) select GENERIC_PCI_IOMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) select GENERIC_PTDUMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) select GENERIC_SCHED_CLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) select GENERIC_SMP_IDLE_THREAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) select GENERIC_STRNCPY_FROM_USER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) select GENERIC_STRNLEN_USER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) select GENERIC_TIME_VSYSCALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) select GENERIC_GETTIMEOFDAY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) select GENERIC_VDSO_TIME_NS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) select HANDLE_DOMAIN_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) select HARDIRQS_SW_RESEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) select HAVE_MOVE_PMD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) select HAVE_MOVE_PUD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) select HAVE_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) select HAVE_ACPI_APEI if (ACPI && EFI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) select HAVE_ALIGNED_STRUCT_PAGE if SLUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) select HAVE_ARCH_AUDITSYSCALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) select HAVE_ARCH_BITREVERSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) select HAVE_ARCH_COMPILER_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) select HAVE_ARCH_HUGE_VMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) select HAVE_ARCH_JUMP_LABEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) select HAVE_ARCH_JUMP_LABEL_RELATIVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) select HAVE_ARCH_KASAN if !(ARM64_16K_PAGES && ARM64_VA_BITS_48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) select HAVE_ARCH_KASAN_VMALLOC if HAVE_ARCH_KASAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) select HAVE_ARCH_KASAN_SW_TAGS if HAVE_ARCH_KASAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) select HAVE_ARCH_KASAN_HW_TAGS if (HAVE_ARCH_KASAN && ARM64_MTE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) select HAVE_ARCH_KFENCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) select HAVE_ARCH_KGDB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) select HAVE_ARCH_MMAP_RND_BITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) select HAVE_ARCH_PREL32_RELOCATIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) select HAVE_ARCH_SECCOMP_FILTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) select HAVE_ARCH_STACKLEAK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) select HAVE_ARCH_THREAD_STRUCT_WHITELIST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) select HAVE_ARCH_TRACEHOOK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) select HAVE_ARCH_TRANSPARENT_HUGEPAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) select HAVE_ARCH_VMAP_STACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) select HAVE_ARM_SMCCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) select HAVE_ASM_MODVERSIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) select HAVE_EBPF_JIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) select HAVE_C_RECORDMCOUNT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) select HAVE_CMPXCHG_DOUBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) select HAVE_CMPXCHG_LOCAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) select HAVE_CONTEXT_TRACKING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) select HAVE_DEBUG_BUGVERBOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) select HAVE_DEBUG_KMEMLEAK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) select HAVE_DMA_CONTIGUOUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) select HAVE_DYNAMIC_FTRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) select HAVE_DYNAMIC_FTRACE_WITH_REGS \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) if $(cc-option,-fpatchable-function-entry=2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) select FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if DYNAMIC_FTRACE_WITH_REGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) select HAVE_EFFICIENT_UNALIGNED_ACCESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) select HAVE_FAST_GUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) select HAVE_FTRACE_MCOUNT_RECORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) select HAVE_FUNCTION_TRACER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) select HAVE_FUNCTION_ERROR_INJECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) select HAVE_FUNCTION_GRAPH_TRACER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) select HAVE_GCC_PLUGINS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) select HAVE_HW_BREAKPOINT if PERF_EVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) select HAVE_IRQ_TIME_ACCOUNTING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) select HAVE_NMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) select HAVE_PATA_PLATFORM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) select HAVE_PERF_EVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) select HAVE_PERF_REGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) select HAVE_PERF_USER_STACK_DUMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) select HAVE_REGS_AND_STACK_ACCESS_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) select HAVE_FUNCTION_ARG_ACCESS_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) select HAVE_FUTEX_CMPXCHG if FUTEX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) select MMU_GATHER_RCU_TABLE_FREE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) select HAVE_RSEQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) select HAVE_STACKPROTECTOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) select HAVE_SYSCALL_TRACEPOINTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) select HAVE_KPROBES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) select HAVE_KRETPROBES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) select HAVE_GENERIC_VDSO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) select IOMMU_DMA if IOMMU_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) select IRQ_DOMAIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) select IRQ_FORCED_THREADING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) select KASAN_VMALLOC if KASAN_GENERIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) select MODULES_USE_ELF_RELA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) select NEED_DMA_MAP_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) select NEED_SG_DMA_LENGTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) select OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) select OF_EARLY_FLATTREE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) select PCI_DOMAINS_GENERIC if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) select PCI_ECAM if (ACPI && PCI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) select PCI_SYSCALL if PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) select POWER_RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) select POWER_SUPPLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) select SET_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) select SPARSE_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) select SWIOTLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) select SYSCTL_EXCEPTION_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) select THREAD_INFO_IN_TASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) select ARCH_SUPPORTS_SPECULATIVE_PAGE_FAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) select HAVE_ARCH_USERFAULTFD_MINOR if USERFAULTFD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ARM 64-bit (AArch64) Linux support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) config 64BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) config MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) config ARM64_PAGE_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) default 16 if ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) default 14 if ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) default 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) config ARM64_CONT_PTE_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) default 5 if ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) default 7 if ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) default 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) config ARM64_CONT_PMD_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) default 5 if ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) default 5 if ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) default 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) config ARCH_MMAP_RND_BITS_MIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) default 14 if ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) default 16 if ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) default 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) # max bits determined by the following formula:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) # VA_BITS - PAGE_SHIFT - 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) config ARCH_MMAP_RND_BITS_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) default 19 if ARM64_VA_BITS=36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) default 24 if ARM64_VA_BITS=39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) default 27 if ARM64_VA_BITS=42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) default 30 if ARM64_VA_BITS=47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) default 29 if ARM64_VA_BITS=48 && ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) default 31 if ARM64_VA_BITS=48 && ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) default 33 if ARM64_VA_BITS=48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) default 14 if ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) default 16 if ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) default 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) config ARCH_MMAP_RND_COMPAT_BITS_MIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) default 7 if ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) default 9 if ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) default 11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) config ARCH_MMAP_RND_COMPAT_BITS_MAX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) default 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) config NO_IOPORT_MAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) def_bool y if !PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) config STACKTRACE_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) config ILLEGAL_POINTER_VALUE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) hex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) default 0xdead000000000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) config LOCKDEP_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) config TRACE_IRQFLAGS_SUPPORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) config GENERIC_BUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) depends on BUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) config GENERIC_BUG_RELATIVE_POINTERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) depends on GENERIC_BUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) config GENERIC_HWEIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) config GENERIC_CSUM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) config GENERIC_CALIBRATE_DELAY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) config ZONE_DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) bool "Support DMA zone" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) config ZONE_DMA32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) bool "Support DMA32 zone" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) config ARCH_ENABLE_MEMORY_HOTPLUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) config ARCH_ENABLE_MEMORY_HOTREMOVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) config SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) config KERNEL_MODE_NEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) config FIX_EARLYCON_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) config PGTABLE_LEVELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) default 2 if ARM64_16K_PAGES && ARM64_VA_BITS_36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) default 3 if ARM64_64K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) config ARCH_SUPPORTS_UPROBES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) config ARCH_PROC_KCORE_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) config BROKEN_GAS_INST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) def_bool !$(as-instr,1:\n.inst 0\n.rept . - 1b\n\nnop\n.endr\n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) config KASAN_SHADOW_OFFSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) hex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) depends on KASAN_GENERIC || KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) default 0xdfffa00000000000 if (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) && !KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) default 0xdfffd00000000000 if ARM64_VA_BITS_47 && !KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) default 0xdffffe8000000000 if ARM64_VA_BITS_42 && !KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) default 0xdfffffd000000000 if ARM64_VA_BITS_39 && !KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) default 0xdffffffa00000000 if ARM64_VA_BITS_36 && !KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) default 0xefff900000000000 if (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) && KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) default 0xefffc80000000000 if ARM64_VA_BITS_47 && KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) default 0xeffffe4000000000 if ARM64_VA_BITS_42 && KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) default 0xefffffc800000000 if ARM64_VA_BITS_39 && KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) default 0xeffffff900000000 if ARM64_VA_BITS_36 && KASAN_SW_TAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) default 0xffffffffffffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) source "arch/arm64/Kconfig.platforms"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) menu "Kernel Features"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) menu "ARM errata workarounds via the alternatives framework"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) config ARM64_WORKAROUND_CLEAN_CACHE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) config ARM64_ERRATUM_826319
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) select ARM64_WORKAROUND_CLEAN_CACHE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) This option adds an alternative code sequence to work around ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) AXI master interface and an L2 cache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) and is unable to accept a certain write via this interface, it will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) not progress on read data presented on the read data channel and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) system can deadlock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) The workaround promotes data cache clean instructions to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) data cache clean-and-invalidate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) Please note that this does not necessarily enable the workaround,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) as it depends on the alternative framework, which will only patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) the kernel if an affected CPU is detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) config ARM64_ERRATUM_827319
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) select ARM64_WORKAROUND_CLEAN_CACHE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) This option adds an alternative code sequence to work around ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) master interface and an L2 cache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) Under certain conditions this erratum can cause a clean line eviction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) to occur at the same time as another transaction to the same address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) on the AMBA 5 CHI interface, which can cause data corruption if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) interconnect reorders the two transactions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) The workaround promotes data cache clean instructions to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) data cache clean-and-invalidate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) Please note that this does not necessarily enable the workaround,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) as it depends on the alternative framework, which will only patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) the kernel if an affected CPU is detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) config ARM64_ERRATUM_824069
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) select ARM64_WORKAROUND_CLEAN_CACHE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) This option adds an alternative code sequence to work around ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) to a coherent interconnect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) If a Cortex-A53 processor is executing a store or prefetch for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) write instruction at the same time as a processor in another
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) cluster is executing a cache maintenance operation to the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) address, then this erratum might cause a clean cache line to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) incorrectly marked as dirty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) The workaround promotes data cache clean instructions to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) data cache clean-and-invalidate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) Please note that this option does not necessarily enable the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) workaround, as it depends on the alternative framework, which will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) only patch the kernel if an affected CPU is detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) config ARM64_ERRATUM_819472
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) select ARM64_WORKAROUND_CLEAN_CACHE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) This option adds an alternative code sequence to work around ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) present when it is connected to a coherent interconnect.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) If the processor is executing a load and store exclusive sequence at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) the same time as a processor in another cluster is executing a cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) maintenance operation to the same address, then this erratum might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) cause data corruption.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) The workaround promotes data cache clean instructions to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) data cache clean-and-invalidate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) Please note that this does not necessarily enable the workaround,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) as it depends on the alternative framework, which will only patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) the kernel if an affected CPU is detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) config ARM64_ERRATUM_832075
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) This option adds an alternative code sequence to work around ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) erratum 832075 on Cortex-A57 parts up to r1p2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) Affected Cortex-A57 parts might deadlock when exclusive load/store
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) instructions to Write-Back memory are mixed with Device loads.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) The workaround is to promote device loads to use Load-Acquire
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) semantics.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) Please note that this does not necessarily enable the workaround,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) as it depends on the alternative framework, which will only patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) the kernel if an affected CPU is detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) config ARM64_ERRATUM_834220
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) bool "Cortex-A57: 834220: Stage 2 translation fault might be incorrectly reported in presence of a Stage 1 fault"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) depends on KVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) This option adds an alternative code sequence to work around ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) erratum 834220 on Cortex-A57 parts up to r1p2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) Affected Cortex-A57 parts might report a Stage 2 translation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) fault as the result of a Stage 1 fault for load crossing a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) page boundary when there is a permission or device memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) alignment fault at Stage 1 and a translation fault at Stage 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) The workaround is to verify that the Stage 1 translation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) doesn't generate a fault before handling the Stage 2 fault.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) Please note that this does not necessarily enable the workaround,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) as it depends on the alternative framework, which will only patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) the kernel if an affected CPU is detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) config ARM64_ERRATUM_845719
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) bool "Cortex-A53: 845719: a load might read incorrect data"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) depends on COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) This option adds an alternative code sequence to work around ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) erratum 845719 on Cortex-A53 parts up to r0p4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) When running a compat (AArch32) userspace on an affected Cortex-A53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) part, a load at EL0 from a virtual address that matches the bottom 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) bits of the virtual address used by a recent load at (AArch64) EL1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) might return incorrect data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) The workaround is to write the contextidr_el1 register on exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return to a 32-bit task.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) Please note that this does not necessarily enable the workaround,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) as it depends on the alternative framework, which will only patch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) the kernel if an affected CPU is detected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) config ARM64_ERRATUM_843419
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) bool "Cortex-A53: 843419: A load or store might access an incorrect address"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) select ARM64_MODULE_PLTS if MODULES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) This option links the kernel with '--fix-cortex-a53-843419' and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) enables PLT support to replace certain ADRP instructions, which can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) cause subsequent memory accesses to use an incorrect address on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) Cortex-A53 parts up to r0p4.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) config ARM64_ERRATUM_1024718
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorrect update"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) This option adds a workaround for ARM Cortex-A55 Erratum 1024718.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) Affected Cortex-A55 cores (all revisions) could cause incorrect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) update of the hardware dirty bit when the DBM/AP bits are updated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) without a break-before-make. The workaround is to disable the usage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) of hardware DBM locally on the affected cores. CPUs not affected by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) this erratum will continue to use the feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) config ARM64_ERRATUM_1418040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) bool "Cortex-A76/Neoverse-N1: MRC read following MRRC read of specific Generic Timer in AArch32 might give incorrect result"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) depends on COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) This option adds a workaround for ARM Cortex-A76/Neoverse-N1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) errata 1188873 and 1418040.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) Affected Cortex-A76/Neoverse-N1 cores (r0p0 to r3p1) could
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) cause register corruption when accessing the timer registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) from AArch32 userspace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) config ARM64_WORKAROUND_SPECULATIVE_AT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) config ARM64_ERRATUM_1165522
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) bool "Cortex-A76: 1165522: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) select ARM64_WORKAROUND_SPECULATIVE_AT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) This option adds a workaround for ARM Cortex-A76 erratum 1165522.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) Affected Cortex-A76 cores (r0p0, r1p0, r2p0) could end-up with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) corrupted TLBs by speculating an AT instruction during a guest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) context switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) config ARM64_ERRATUM_1319367
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) bool "Cortex-A57/A72: 1319537: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) select ARM64_WORKAROUND_SPECULATIVE_AT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) This option adds work arounds for ARM Cortex-A57 erratum 1319537
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) and A72 erratum 1319367
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) Cortex-A57 and A72 cores could end-up with corrupted TLBs by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) speculating an AT instruction during a guest context switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) config ARM64_ERRATUM_1530923
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) bool "Cortex-A55: 1530923: Speculative AT instruction using out-of-context translation regime could cause subsequent request to generate an incorrect translation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) select ARM64_WORKAROUND_SPECULATIVE_AT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) This option adds a workaround for ARM Cortex-A55 erratum 1530923.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) Affected Cortex-A55 cores (r0p0, r0p1, r1p0, r2p0) could end-up with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) corrupted TLBs by speculating an AT instruction during a guest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) context switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) config ARM64_WORKAROUND_REPEAT_TLBI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) config ARM64_ERRATUM_1286807
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) bool "Cortex-A76: Modification of the translation table for a virtual address might lead to read-after-read ordering violation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) select ARM64_WORKAROUND_REPEAT_TLBI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) This option adds a workaround for ARM Cortex-A76 erratum 1286807.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) On the affected Cortex-A76 cores (r0p0 to r3p0), if a virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) address for a cacheable mapping of a location is being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) accessed by a core while another core is remapping the virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) address to a new physical page using the recommended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) break-before-make sequence, then under very rare circumstances
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) TLBI+DSB completes before a read using the translation being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) invalidated has been observed by other observers. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) workaround repeats the TLBI+DSB operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) config ARM64_ERRATUM_1463225
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) bool "Cortex-A76: Software Step might prevent interrupt recognition"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) This option adds a workaround for Arm Cortex-A76 erratum 1463225.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) On the affected Cortex-A76 cores (r0p0 to r3p1), software stepping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) of a system call instruction (SVC) can prevent recognition of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) subsequent interrupts when software stepping is disabled in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) exception handler of the system call and either kernel debugging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) is enabled or VHE is in use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) Work around the erratum by triggering a dummy step exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) when handling a system call from a task that is being stepped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) in a VHE configuration of the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) config ARM64_ERRATUM_1542419
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) bool "Neoverse-N1: workaround mis-ordering of instruction fetches"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) This option adds a workaround for ARM Neoverse-N1 erratum
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) 1542419.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) Affected Neoverse-N1 cores could execute a stale instruction when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) modified by another CPU. The workaround depends on a firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) counterpart.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) Workaround the issue by hiding the DIC feature from EL0. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) forces user-space to perform cache maintenance.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) config ARM64_ERRATUM_1508412
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) bool "Cortex-A77: 1508412: workaround deadlock on sequence of NC/Device load and store exclusive or PAR read"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) This option adds a workaround for Arm Cortex-A77 erratum 1508412.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) Affected Cortex-A77 cores (r0p0, r1p0) could deadlock on a sequence
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) of a store-exclusive or read of PAR_EL1 and a load with device or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) non-cacheable memory attributes. The workaround depends on a firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) counterpart.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) KVM guests must also have the workaround implemented or they can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) deadlock the system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) Work around the issue by inserting DMB SY barriers around PAR_EL1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) register reads and warning KVM users. The DMB barrier is sufficient
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) to prevent a speculative PAR_EL1 read.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) config ARM64_ERRATUM_2051678
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) bool "Cortex-A510: 2051678: disable Hardware Update of the page table's dirty bit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) Affected Coretex-A510 might not respect the ordering rules for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) hardware update of the page table's dirty bit. The workaround
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) is to not enable the feature on affected CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) config ARM64_WORKAROUND_TSB_FLUSH_FAILURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) config ARM64_ERRATUM_2054223
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) bool "Cortex-A710: 2054223: workaround TSB instruction failing to flush trace"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) select ARM64_WORKAROUND_TSB_FLUSH_FAILURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) Enable workaround for ARM Cortex-A710 erratum 2054223
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) Affected cores may fail to flush the trace data on a TSB instruction, when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) the PE is in trace prohibited state. This will cause losing a few bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) of the trace cached.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) Workaround is to issue two TSB consecutively on affected cores.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) config ARM64_ERRATUM_2067961
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) bool "Neoverse-N2: 2067961: workaround TSB instruction failing to flush trace"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) select ARM64_WORKAROUND_TSB_FLUSH_FAILURE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) Enable workaround for ARM Neoverse-N2 erratum 2067961
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) Affected cores may fail to flush the trace data on a TSB instruction, when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) the PE is in trace prohibited state. This will cause losing a few bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) of the trace cached.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) Workaround is to issue two TSB consecutively on affected cores.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) config CAVIUM_ERRATUM_22375
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) bool "Cavium erratum 22375, 24313"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) Enable workaround for errata 22375 and 24313.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) This implements two gicv3-its errata workarounds for ThunderX. Both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) with a small impact affecting only ITS table allocation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) erratum 22375: only alloc 8MB table size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) erratum 24313: ignore memory access type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) The fixes are in ITS initialization and basically ignore memory access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) type and table size provided by the TYPER and BASER registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) config CAVIUM_ERRATUM_23144
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) bool "Cavium erratum 23144: ITS SYNC hang on dual socket system"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) depends on NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ITS SYNC command hang for cross node io and collections/cpu mapping.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) config CAVIUM_ERRATUM_23154
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) The gicv3 of ThunderX requires a modified version for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) reading the IAR status to ensure data synchronization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) (access to icc_iar1_el1 is not sync'ed before and after).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) config CAVIUM_ERRATUM_27456
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) bool "Cavium erratum 27456: Broadcast TLBI instructions may cause icache corruption"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) instructions may cause the icache to become corrupted if it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) contains data for a non-current ASID. The fix is to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) invalidate the icache when changing the mm context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) config CAVIUM_ERRATUM_30115
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) bool "Cavium erratum 30115: Guest may disable interrupts in host"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) On ThunderX T88 pass 1.x through 2.2, T81 pass 1.0 through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) 1.2, and T83 Pass 1.0, KVM guest execution may disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) interrupts in host. Trapping both GICv3 group-0 and group-1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) accesses sidesteps the issue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) config CAVIUM_TX2_ERRATUM_219
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) On Cavium ThunderX2, a load, store or prefetch instruction between a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) TTBR update and the corresponding context synchronizing operation can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) cause a spurious Data Abort to be delivered to any hardware thread in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) the CPU core.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) Work around the issue by avoiding the problematic code sequence and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) trapping KVM guest TTBRx_EL1 writes to EL2 when SMT is enabled. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) trap handler performs the corresponding register access, skips the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) instruction and ensures context synchronization by virtue of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) exception return.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) config FUJITSU_ERRATUM_010001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) bool "Fujitsu-A64FX erratum E#010001: Undefined fault may occur wrongly"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) This option adds a workaround for Fujitsu-A64FX erratum E#010001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) On some variants of the Fujitsu-A64FX cores ver(1.0, 1.1), memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) accesses may cause undefined fault (Data abort, DFSC=0b111111).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) This fault occurs under a specific hardware condition when a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) load/store instruction performs an address translation using:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) case-1 TTBR0_EL1 with TCR_EL1.NFD0 == 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) case-2 TTBR0_EL2 with TCR_EL2.NFD0 == 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) case-4 TTBR1_EL2 with TCR_EL2.NFD1 == 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) The workaround is to ensure these bits are clear in TCR_ELx.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) The workaround only affects the Fujitsu-A64FX.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) config HISILICON_ERRATUM_161600802
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) bool "Hip07 161600802: Erroneous redistributor VLPI base"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) The HiSilicon Hip07 SoC uses the wrong redistributor base
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) when issued ITS commands such as VMOVP and VMAPP, and requires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) a 128kB offset to be applied to the target address in this commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) config QCOM_FALKOR_ERRATUM_1003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) bool "Falkor E1003: Incorrect translation due to ASID change"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) On Falkor v1, an incorrect ASID may be cached in the TLB when ASID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) and BADDR are changed together in TTBRx_EL1. Since we keep the ASID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) in TTBR1_EL1, this situation only occurs in the entry trampoline and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) then only for entries in the walk cache, since the leaf translation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) is unchanged. Work around the erratum by invalidating the walk cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) entries for the trampoline before entering the kernel proper.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) config QCOM_FALKOR_ERRATUM_1009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) bool "Falkor E1009: Prematurely complete a DSB after a TLBI"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) select ARM64_WORKAROUND_REPEAT_TLBI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) On Falkor v1, the CPU may prematurely complete a DSB following a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) TLBI xxIS invalidate maintenance operation. Repeat the TLBI operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) one more time to fix the issue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) config QCOM_QDF2400_ERRATUM_0065
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) bool "QDF2400 E0065: Incorrect GITS_TYPER.ITT_Entry_size"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) ITE size incorrectly. The GITS_TYPER.ITT_Entry_size field should have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) been indicated as 16Bytes (0xf), not 8Bytes (0x7).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) config QCOM_FALKOR_ERRATUM_E1041
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) bool "Falkor E1041: Speculative instruction fetches might cause errant memory access"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) Falkor CPU may speculatively fetch instructions from an improper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) memory location when MMU translation is changed from SCTLR_ELn[M]=1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) to SCTLR_ELn[M]=0. Prefix an ISB instruction to fix the problem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) config SOCIONEXT_SYNQUACER_PREITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) bool "Socionext Synquacer: Workaround for GICv3 pre-ITS"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) Socionext Synquacer SoCs implement a separate h/w block to generate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) MSI doorbell writes with non-zero values for the device ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) prompt "Page size"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) default ARM64_4K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) Page size (translation granule) configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) config ARM64_4K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) bool "4KB"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) This feature enables 4KB pages support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) config ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) bool "16KB"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) The system will use 16KB pages support. AArch32 emulation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) requires applications compiled with 16K (or a multiple of 16K)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) aligned segments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) config ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) bool "64KB"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) This feature enables 64KB pages support (4KB by default)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) allowing only two levels of page tables and faster TLB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) look-up. AArch32 emulation requires applications compiled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) with 64K aligned segments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) prompt "Virtual address space size"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) default ARM64_VA_BITS_39 if ARM64_4K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) default ARM64_VA_BITS_47 if ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) default ARM64_VA_BITS_42 if ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) Allows choosing one of multiple possible virtual address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) space sizes. The level of translation table is determined by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) a combination of page size and virtual address space size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) config ARM64_VA_BITS_36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) bool "36-bit" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) depends on ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) config ARM64_VA_BITS_39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) bool "39-bit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) depends on ARM64_4K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) config ARM64_VA_BITS_42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) bool "42-bit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) depends on ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) config ARM64_VA_BITS_47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) bool "47-bit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) depends on ARM64_16K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) config ARM64_VA_BITS_48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) bool "48-bit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) config ARM64_VA_BITS_52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) bool "52-bit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) depends on ARM64_64K_PAGES && (ARM64_PAN || !ARM64_SW_TTBR0_PAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) Enable 52-bit virtual addressing for userspace when explicitly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) requested via a hint to mmap(). The kernel will also use 52-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) virtual addresses for its own mappings (provided HW support for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) this feature is available, otherwise it reverts to 48-bit).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) NOTE: Enabling 52-bit virtual addressing in conjunction with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) ARMv8.3 Pointer Authentication will result in the PAC being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) reduced from 7 bits to 3 bits, which may have a significant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) impact on its susceptibility to brute-force attacks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) If unsure, select 48-bit virtual addressing instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) config ARM64_FORCE_52BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) bool "Force 52-bit virtual addresses for userspace"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) depends on ARM64_VA_BITS_52 && EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) For systems with 52-bit userspace VAs enabled, the kernel will attempt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) to maintain compatibility with older software by providing 48-bit VAs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) unless a hint is supplied to mmap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) This configuration option disables the 48-bit compatibility logic, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) forces all userspace addresses to be 52-bit on HW that supports it. One
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) should only enable this configuration option for stress testing userspace
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) memory management code. If unsure say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) config ARM64_VA_BITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) default 36 if ARM64_VA_BITS_36
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) default 39 if ARM64_VA_BITS_39
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) default 42 if ARM64_VA_BITS_42
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) default 47 if ARM64_VA_BITS_47
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) default 48 if ARM64_VA_BITS_48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) default 52 if ARM64_VA_BITS_52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) prompt "Physical address space size"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) default ARM64_PA_BITS_48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) Choose the maximum physical address range that the kernel will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) config ARM64_PA_BITS_48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) bool "48-bit"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) config ARM64_PA_BITS_52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) bool "52-bit (ARMv8.2)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) depends on ARM64_64K_PAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) Enable support for a 52-bit physical address space, introduced as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) part of the ARMv8.2-LPA extension.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) With this enabled, the kernel will also continue to work on CPUs that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) do not support ARMv8.2-LPA, but with some added memory overhead (and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) minor performance overhead).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) config ARM64_PA_BITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) default 48 if ARM64_PA_BITS_48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) default 52 if ARM64_PA_BITS_52
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) prompt "Endianness"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) default CPU_LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) Select the endianness of data accesses performed by the CPU. Userspace
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) applications will need to be compiled and linked for the endianness
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) that is selected here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) config CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) bool "Build big-endian kernel"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) depends on !LD_IS_LLD || LLD_VERSION >= 130000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) Say Y if you plan on running a kernel with a big-endian userspace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) config CPU_LITTLE_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) bool "Build little-endian kernel"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) Say Y if you plan on running a kernel with a little-endian userspace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) This is usually the case for distributions targeting arm64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) config SCHED_MC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) bool "Multi-core scheduler support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) Multi-core scheduler support improves the CPU scheduler's decision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) making when dealing with multi-core CPU chips at a cost of slightly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) increased overhead in some places. If unsure say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) config SCHED_SMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) bool "SMT scheduler support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) Improves the CPU scheduler's decision making when dealing with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) MultiThreading at a cost of slightly increased overhead in some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) places. If unsure say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) config NR_CPUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) int "Maximum number of CPUs (2-4096)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) range 2 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) default "256"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) config HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) bool "Support for hot-pluggable CPUs"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) select GENERIC_IRQ_MIGRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) Say Y here to experiment with turning CPUs off and on. CPUs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) can be controlled through /sys/devices/system/cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) # Common NUMA Features
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) config NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) bool "NUMA Memory Allocation and Scheduler Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) select ACPI_NUMA if ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) select OF_NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) Enable NUMA (Non-Uniform Memory Access) support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) The kernel will try to allocate memory used by a CPU on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) local memory of the CPU and add some more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) NUMA awareness to the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) config NODES_SHIFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) int "Maximum NUMA Nodes (as a power of 2)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) range 1 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) default "4"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) depends on NEED_MULTIPLE_NODES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) Specify the maximum number of NUMA Nodes available on the target
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) system. Increases memory reserved to accommodate various tables.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) config USE_PERCPU_NUMA_NODE_ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) depends on NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) config HAVE_SETUP_PER_CPU_AREA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) depends on NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) config NEED_PER_CPU_EMBED_FIRST_CHUNK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) depends on NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) config HOLES_IN_ZONE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) source "kernel/Kconfig.hz"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) config ARCH_SUPPORTS_DEBUG_PAGEALLOC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) config ARCH_SPARSEMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) select SPARSEMEM_VMEMMAP_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) config ARCH_SPARSEMEM_DEFAULT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) def_bool ARCH_SPARSEMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) config ARCH_SELECT_MEMORY_MODEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) def_bool ARCH_SPARSEMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) config ARCH_FLATMEM_ENABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) def_bool !NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) config HAVE_ARCH_PFN_VALID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) config HW_PERF_EVENTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) depends on ARM_PMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) config SYS_SUPPORTS_HUGETLBFS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) config ARCH_WANT_HUGE_PMD_SHARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) config ARCH_HAS_CACHE_LINE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) config ARCH_ENABLE_SPLIT_PMD_PTLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) def_bool y if PGTABLE_LEVELS > 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) # Supported by clang >= 7.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) config CC_HAVE_SHADOW_CALL_STACK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) def_bool $(cc-option, -fsanitize=shadow-call-stack -ffixed-x18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) config PARAVIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) bool "Enable paravirtualization code"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) This changes the kernel so it can modify itself when it is run
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) under a hypervisor, potentially improving performance significantly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) over full virtualization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) config PARAVIRT_TIME_ACCOUNTING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) bool "Paravirtual steal time accounting"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) select PARAVIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) Select this option to enable fine granularity task steal time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) accounting. Time spent executing other tasks in parallel with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) the current vCPU is discounted from the vCPU power. To account for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) that, there can be a small performance impact.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) If in doubt, say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) config KEXEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) depends on PM_SLEEP_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) select KEXEC_CORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) bool "kexec system call"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) kexec is a system call that implements the ability to shutdown your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) current kernel, and to start another kernel. It is like a reboot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) but it is independent of the system firmware. And like a reboot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) you can start any kernel with it, not just Linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) config KEXEC_FILE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) bool "kexec file based system call"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) select KEXEC_CORE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) This is new version of kexec system call. This system call is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) file based and takes file descriptors as system call argument
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) for kernel and initramfs as opposed to list of segments as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) accepted by previous system call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) config KEXEC_SIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) bool "Verify kernel signature during kexec_file_load() syscall"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) depends on KEXEC_FILE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) Select this option to verify a signature with loaded kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) image. If configured, any attempt of loading a image without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) valid signature will fail.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) In addition to that option, you need to enable signature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) verification for the corresponding kernel image type being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) loaded in order for this to work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) config KEXEC_IMAGE_VERIFY_SIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) bool "Enable Image signature verification support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) depends on KEXEC_SIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) depends on EFI && SIGNED_PE_FILE_VERIFICATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) Enable Image signature verification support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) comment "Support for PE file signature verification disabled"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) depends on KEXEC_SIG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) depends on !EFI || !SIGNED_PE_FILE_VERIFICATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) config CRASH_DUMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) bool "Build kdump crash kernel"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) Generate crash dump after being started by kexec. This should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) be normally only set in special crash dump kernels which are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) loaded in the main kernel with kexec-tools into a specially
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) reserved region and then later executed after a crash by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) kdump/kexec.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) For more details see Documentation/admin-guide/kdump/kdump.rst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) config XEN_DOM0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) depends on XEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) config XEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) bool "Xen guest support on ARM64"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) depends on ARM64 && OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) select SWIOTLB_XEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) select PARAVIRT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) config FORCE_MAX_ZONEORDER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) default "11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) The kernel memory allocator divides physically contiguous memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) blocks into "zones", where each zone is a power of two number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) pages. This option selects the largest power of two that the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) keeps in the memory allocator. If you need to allocate very large
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) blocks of physically contiguous memory, then you may need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) increase this value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) This config option is actually maximum order plus one. For example,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) a value of 11 means that the largest free memory block is 2^10 pages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) We make sure that we can allocate upto a HugePage size for each configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) Hence we have :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) MAX_ORDER = (PMD_SHIFT - PAGE_SHIFT) + 1 => PAGE_SHIFT - 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) However for 4K, we choose a higher default value, 11 as opposed to 10, giving us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) 4M allocations matching the default size used by generic code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) config UNMAP_KERNEL_AT_EL0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) bool "Unmap kernel when running in userspace (aka \"KAISER\")" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) Speculation attacks against some high-performance processors can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) be used to bypass MMU permission checks and leak kernel data to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) userspace. This can be defended against by unmapping the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) when running in userspace, mapping it back in on exception entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) via a trampoline page in the vector table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) config MITIGATE_SPECTRE_BRANCH_HISTORY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) bool "Mitigate Spectre style attacks against branch history" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) Speculation attacks against some high-performance processors can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) make use of branch history to influence future speculation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) When taking an exception from user-space, a sequence of branches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) or a firmware call overwrites the branch history.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) config RODATA_FULL_DEFAULT_ENABLED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) bool "Apply r/o permissions of VM areas also to their linear aliases"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) Apply read-only attributes of VM areas to the linear alias of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) the backing pages as well. This prevents code or read-only data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) from being modified (inadvertently or intentionally) via another
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) mapping of the same memory page. This additional enhancement can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) be turned off at runtime by passing rodata=[off|on] (and turned on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) with rodata=full if this option is set to 'n')
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) This requires the linear region to be mapped down to pages,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) which may adversely affect performance in some cases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) config ARM64_SW_TTBR0_PAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) bool "Emulate Privileged Access Never using TTBR0_EL1 switching"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) Enabling this option prevents the kernel from accessing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) user-space memory directly by pointing TTBR0_EL1 to a reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) zeroed area and reserved ASID. The user access routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) restore the valid TTBR0_EL1 temporarily.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) config ARM64_TAGGED_ADDR_ABI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) bool "Enable the tagged user addresses syscall ABI"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) When this option is enabled, user applications can opt in to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) relaxed ABI via prctl() allowing tagged addresses to be passed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) to system calls as pointer arguments. For details, see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) Documentation/arm64/tagged-address-abi.rst.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) menuconfig COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) bool "Kernel support for 32-bit EL0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) depends on ARM64_4K_PAGES || EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) select COMPAT_BINFMT_ELF if BINFMT_ELF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) select HAVE_UID16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) select OLD_SIGSUSPEND3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) select COMPAT_OLD_SIGACTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) This option enables support for a 32-bit EL0 running under a 64-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) kernel at EL1. AArch32-specific components such as system calls,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) the user helper functions, VFP support and the ptrace interface are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) handled appropriately by the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) If you use a page size other than 4KB (i.e, 16KB or 64KB), please be aware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) that you will only be able to execute AArch32 binaries that were compiled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) with page size aligned segments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) If you want to execute 32-bit userspace applications, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) if COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) config KUSER_HELPERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) bool "Enable kuser helpers page for 32-bit applications"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) Warning: disabling this option may break 32-bit user programs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) Provide kuser helpers to compat tasks. The kernel provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) helper code to userspace in read only form at a fixed location
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) to allow userspace to be independent of the CPU type fitted to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) the system. This permits binaries to be run on ARMv4 through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) to ARMv8 without modification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) See Documentation/arm/kernel_user_helpers.rst for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) However, the fixed address nature of these helpers can be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) by ROP (return orientated programming) authors when creating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) exploits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) If all of the binaries and libraries which run on your platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) are built specifically for your platform, and make no use of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) these helpers, then you can turn this option off to hinder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) such exploits. However, in that case, if a binary or library
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) relying on those helpers is run, it will not function correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) Say N here only if you are absolutely certain that you do not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) need these helpers; otherwise, the safe option is to say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) config COMPAT_VDSO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) bool "Enable vDSO for 32-bit applications"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) depends on !CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) depends on (CC_IS_CLANG && LD_IS_LLD) || "$(CROSS_COMPILE_COMPAT)" != ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) select GENERIC_COMPAT_VDSO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) Place in the process address space of 32-bit applications an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) ELF shared object providing fast implementations of gettimeofday
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) and clock_gettime.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) You must have a 32-bit build of glibc 2.22 or later for programs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) to seamlessly take advantage of this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) config THUMB2_COMPAT_VDSO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) bool "Compile the 32-bit vDSO for Thumb-2 mode" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) depends on COMPAT_VDSO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) Compile the compat vDSO with '-mthumb -fomit-frame-pointer' if y,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) otherwise with '-marm'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) menuconfig ARMV8_DEPRECATED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) bool "Emulate deprecated/obsolete ARMv8 instructions"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) depends on SYSCTL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) Legacy software support may require certain instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) that have been deprecated or obsoleted in the architecture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) Enable this config to enable selective emulation of these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) features.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) If unsure, say Y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) if ARMV8_DEPRECATED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) config SWP_EMULATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) bool "Emulate SWP/SWPB instructions"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) they are always undefined. Say Y here to enable software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) emulation of these instructions for userspace using LDXR/STXR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) This feature can be controlled at runtime with the abi.swp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) sysctl which is disabled by default.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) In some older versions of glibc [<=2.8] SWP is used during futex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) trylock() operations with the assumption that the code will not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) be preempted. This invalid assumption may be more likely to fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) with SWP emulation enabled, leading to deadlock of the user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) application.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) NOTE: when accessing uncached shared regions, LDXR/STXR rely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) on an external transaction monitoring block called a global
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) monitor to maintain update atomicity. If your system does not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) implement a global monitor, this option can cause programs that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) perform SWP operations to uncached memory to deadlock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) If unsure, say Y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) config CP15_BARRIER_EMULATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) bool "Emulate CP15 Barrier instructions"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) The CP15 barrier instructions - CP15ISB, CP15DSB, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) strongly recommended to use the ISB, DSB, and DMB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) instructions instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) Say Y here to enable software emulation of these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) instructions for AArch32 userspace code. When this option is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) enabled, CP15 barrier usage is traced which can help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) identify software that needs updating. This feature can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) controlled at runtime with the abi.cp15_barrier sysctl.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) If unsure, say Y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) config SETEND_EMULATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) bool "Emulate SETEND instruction"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) The SETEND instruction alters the data-endianness of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) AArch32 EL0, and is deprecated in ARMv8.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) Say Y here to enable software emulation of the instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) for AArch32 userspace code. This feature can be controlled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413) at runtime with the abi.setend sysctl.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) Note: All the cpus on the system must have mixed endian support at EL0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) for this feature to be enabled. If a new CPU - which doesn't support mixed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) endian - is hotplugged in after this feature has been enabled, there could
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) be unexpected results in the applications.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) If unsure, say Y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) menu "ARMv8.1 architectural features"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) config ARM64_HW_AFDBM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) bool "Support for hardware updates of the Access and Dirty page flags"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) The ARMv8.1 architecture extensions introduce support for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) hardware updates of the access and dirty information in page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) table entries. When enabled in TCR_EL1 (HA and HD bits) on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) capable processors, accesses to pages with PTE_AF cleared will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) set this bit instead of raising an access flag fault.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) Similarly, writes to read-only pages with the DBM bit set will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) clear the read-only bit (AP[2]) instead of raising a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) permission fault.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) Kernels built with this configuration option enabled continue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) to work on pre-ARMv8.1 hardware and the performance impact is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) minimal. If unsure, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) config ARM64_PAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) bool "Enable support for Privileged Access Never (PAN)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) Privileged Access Never (PAN; part of the ARMv8.1 Extensions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) prevents the kernel or hypervisor from accessing user-space (EL0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) memory directly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) Choosing this option will cause any unprotected (not using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) copy_to_user et al) memory access to fail with a permission fault.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) The feature is detected at runtime, and will remain as a 'nop'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) instruction if the cpu does not implement the feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) config AS_HAS_LDAPR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) def_bool $(as-instr,.arch_extension rcpc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) config AS_HAS_LSE_ATOMICS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) def_bool $(as-instr,.arch_extension lse)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) config ARM64_LSE_ATOMICS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) default ARM64_USE_LSE_ATOMICS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) depends on AS_HAS_LSE_ATOMICS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) config ARM64_USE_LSE_ATOMICS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) bool "Atomic instructions"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) depends on JUMP_LABEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) As part of the Large System Extensions, ARMv8.1 introduces new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) atomic instructions that are designed specifically to scale in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) very large systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) Say Y here to make use of these instructions for the in-kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) atomic routines. This incurs a small overhead on CPUs that do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) not support these instructions and requires the kernel to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) built with binutils >= 2.25 in order for the new instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) to be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) config ARM64_VHE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) bool "Enable support for Virtualization Host Extensions (VHE)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) Virtualization Host Extensions (VHE) allow the kernel to run
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) directly at EL2 (instead of EL1) on processors that support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) it. This leads to better performance for KVM, as they reduce
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) the cost of the world switch.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) Selecting this option allows the VHE feature to be detected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) at runtime, and does not affect processors that do not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) implement this feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) menu "ARMv8.2 architectural features"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) config ARM64_UAO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) bool "Enable support for User Access Override (UAO)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) User Access Override (UAO; part of the ARMv8.2 Extensions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) causes the 'unprivileged' variant of the load/store instructions to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) be overridden to be privileged.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) This option changes get_user() and friends to use the 'unprivileged'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510) variant of the load/store instructions. This ensures that user-space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) really did have access to the supplied memory. When addr_limit is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) set to kernel memory the UAO bit will be set, allowing privileged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) access to kernel memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) Choosing this option will cause copy_to_user() et al to use user-space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) memory permissions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) The feature is detected at runtime, the kernel will use the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) regular load/store instructions if the cpu does not implement the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) config ARM64_PMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) bool "Enable support for persistent memory"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) select ARCH_HAS_PMEM_API
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) select ARCH_HAS_UACCESS_FLUSHCACHE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) Say Y to enable support for the persistent memory API based on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) ARMv8.2 DCPoP feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) The feature is detected at runtime, and the kernel will use DC CVAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) operations if DC CVAP is not supported (following the behaviour of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) DC CVAP itself if the system does not define a point of persistence).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) config ARM64_RAS_EXTN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) bool "Enable support for RAS CPU Extensions"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538) CPUs that support the Reliability, Availability and Serviceability
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) (RAS) Extensions, part of ARMv8.2 are able to track faults and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) errors, classify them and report them to software.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) On CPUs with these extensions system software can use additional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) barriers to determine if faults are pending and read the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) classification from a new set of registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) Selecting this feature will allow the kernel to use these barriers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) and access the new registers if the system supports the extension.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) Platform RAS features may additionally depend on firmware support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) config ARM64_CNP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) bool "Enable support for Common Not Private (CNP) translations"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) depends on ARM64_PAN || !ARM64_SW_TTBR0_PAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) Common Not Private (CNP) allows translation table entries to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) be shared between different PEs in the same inner shareable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) domain, so the hardware can use this fact to optimise the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) caching of such entries in the TLB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) Selecting this option allows the CNP feature to be detected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) at runtime, and does not affect PEs that do not implement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) this feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) menu "ARMv8.3 architectural features"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) config ARM64_PTR_AUTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) bool "Enable support for pointer authentication"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) depends on (CC_HAS_SIGN_RETURN_ADDRESS || CC_HAS_BRANCH_PROT_PAC_RET) && AS_HAS_PAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) # Modern compilers insert a .note.gnu.property section note for PAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) # which is only understood by binutils starting with version 2.33.1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) depends on LD_IS_LLD || LD_VERSION >= 233010000 || (CC_IS_GCC && GCC_VERSION < 90100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) depends on !CC_IS_CLANG || AS_HAS_CFI_NEGATE_RA_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) Pointer authentication (part of the ARMv8.3 Extensions) provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) instructions for signing and authenticating pointers against secret
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) keys, which can be used to mitigate Return Oriented Programming (ROP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) and other attacks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) This option enables these instructions at EL0 (i.e. for userspace).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) Choosing this option will cause the kernel to initialise secret keys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) for each process at exec() time, with these keys being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) context-switched along with the process.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) If the compiler supports the -mbranch-protection or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) -msign-return-address flag (e.g. GCC 7 or later), then this option
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) will also cause the kernel itself to be compiled with return address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) protection. In this case, and if the target hardware is known to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) support pointer authentication, then CONFIG_STACKPROTECTOR can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) disabled with minimal loss of protection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) The feature is detected at runtime. If the feature is not present in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) hardware it will not be advertised to userspace/KVM guest nor will it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) be enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) If the feature is present on the boot CPU but not on a late CPU, then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600) the late CPU will be parked. Also, if the boot CPU does not have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) address auth and the late CPU has then the late CPU will still boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) but with the feature disabled. On such a system, this option should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) not be selected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) This feature works with FUNCTION_GRAPH_TRACER option only if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) DYNAMIC_FTRACE_WITH_REGS is enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) config CC_HAS_BRANCH_PROT_PAC_RET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) # GCC 9 or later, clang 8 or later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) def_bool $(cc-option,-mbranch-protection=pac-ret+leaf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) config CC_HAS_SIGN_RETURN_ADDRESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) # GCC 7, 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) def_bool $(cc-option,-msign-return-address=all)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) config AS_HAS_PAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617) def_bool $(cc-option,-Wa$(comma)-march=armv8.3-a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) config AS_HAS_CFI_NEGATE_RA_STATE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) def_bool $(as-instr,.cfi_startproc\n.cfi_negate_ra_state\n.cfi_endproc\n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) menu "ARMv8.4 architectural features"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) config ARM64_AMU_EXTN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) bool "Enable support for the Activity Monitors Unit CPU extension"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) The activity monitors extension is an optional extension introduced
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631) by the ARMv8.4 CPU architecture. This enables support for version 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) of the activity monitors architecture, AMUv1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) To enable the use of this extension on CPUs that implement it, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) Note that for architectural reasons, firmware _must_ implement AMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) support when running on CPUs that present the activity monitors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) extension. The required support is present in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) * Version 1.5 and later of the ARM Trusted Firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) For kernels that have this configuration enabled but boot with broken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) firmware, you may need to say N here until the firmware is fixed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) Otherwise you may experience firmware panics or lockups when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) accessing the counter registers. Even if you are not observing these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) symptoms, the values returned by the register reads might not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) correctly reflect reality. Most commonly, the value read will be 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) indicating that the counter is not enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) config AS_HAS_ARMV8_4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) def_bool $(cc-option,-Wa$(comma)-march=armv8.4-a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) config ARM64_TLB_RANGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) bool "Enable support for tlbi range feature"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655) depends on AS_HAS_ARMV8_4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) range of input addresses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) The feature introduces new assembly instructions, and they were
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) support when binutils >= 2.30.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) menu "ARMv8.5 architectural features"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667) config AS_HAS_ARMV8_5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) def_bool $(cc-option,-Wa$(comma)-march=armv8.5-a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) config ARM64_BTI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) bool "Branch Target Identification support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) Branch Target Identification (part of the ARMv8.5 Extensions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) provides a mechanism to limit the set of locations to which computed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) branch instructions such as BR or BLR can jump.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) To make use of BTI on CPUs that support it, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) BTI is intended to provide complementary protection to other control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) flow integrity protection mechanisms, such as the Pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) authentication mechanism provided as part of the ARMv8.3 Extensions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) For this reason, it does not make sense to enable this option without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) also enabling support for pointer authentication. Thus, when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) enabling this option you should also select ARM64_PTR_AUTH=y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) Userspace binaries must also be specifically compiled to make use of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) this mechanism. If you say N here or the hardware does not support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) BTI, such binaries can still run, but you get no additional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) enforcement of branch destinations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) config ARM64_BTI_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) bool "Use Branch Target Identification for kernel"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) depends on ARM64_BTI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) depends on ARM64_PTR_AUTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697) depends on CC_HAS_BRANCH_PROT_PAC_RET_BTI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) # https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94697
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) depends on !CC_IS_GCC || GCC_VERSION >= 100100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) depends on !(CC_IS_CLANG && GCOV_KERNEL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701) # https://bugs.llvm.org/show_bug.cgi?id=46258
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) depends on !CFI_CLANG || CLANG_VERSION >= 120000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) Build the kernel with Branch Target Identification annotations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) and enable enforcement of this for kernel code. When this option
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) is enabled and the system supports BTI all kernel code including
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) modular code must have BTI enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) config CC_HAS_BRANCH_PROT_PAC_RET_BTI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) # GCC 9 or later, clang 8 or later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) def_bool $(cc-option,-mbranch-protection=pac-ret+leaf+bti)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) config ARM64_E0PD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) bool "Enable support for E0PD"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) E0PD (part of the ARMv8.5 extensions) allows us to ensure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) that EL0 accesses made via TTBR1 always fault in constant time,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) providing similar benefits to KASLR as those provided by KPTI, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) with lower overhead and without disrupting legitimate access to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) kernel memory such as SPE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) This option enables E0PD for TTBR1 where available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) config ARCH_RANDOM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) bool "Enable support for random number generation"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) Random number generation (part of the ARMv8.5 Extensions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) provides a high bandwidth, cryptographically secure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) hardware random number generator.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) config ARM64_AS_HAS_MTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) # Initial support for MTE went in binutils 2.32.0, checked with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) # ".arch armv8.5-a+memtag" below. However, this was incomplete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) # as a late addition to the final architecture spec (LDGM/STGM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) # is only supported in the newer 2.32.x and 2.33 binutils
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) # versions, hence the extra "stgm" instruction check below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) def_bool $(as-instr,.arch armv8.5-a+memtag\nstgm xzr$(comma)[x0])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) config ARM64_MTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) bool "Memory Tagging Extension support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) depends on ARM64_AS_HAS_MTE && ARM64_TAGGED_ADDR_ABI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) depends on AS_HAS_ARMV8_5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) # Required for tag checking in the uaccess routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) depends on ARM64_PAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) depends on AS_HAS_LSE_ATOMICS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) select ARCH_USES_HIGH_VMA_FLAGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) Memory Tagging (part of the ARMv8.5 Extensions) provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) architectural support for run-time, always-on detection of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) various classes of memory error to aid with software debugging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) to eliminate vulnerabilities arising from memory-unsafe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) languages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) This option enables the support for the Memory Tagging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) Extension at EL0 (i.e. for userspace).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) Selecting this option allows the feature to be detected at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762) runtime. Any secondary CPU not implementing this feature will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) not be allowed a late bring-up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) Userspace binaries that want to use this feature must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) explicitly opt in. The mechanism for the userspace is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) described in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) Documentation/arm64/memory-tagging-extension.rst.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) config ARM64_SVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774) bool "ARM Scalable Vector Extension support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) The Scalable Vector Extension (SVE) is an extension to the AArch64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) execution state which complements and extends the SIMD functionality
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) of the base architecture to support much larger vectors and to enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) additional vectorisation opportunities.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782) To enable use of this extension on CPUs that implement it, say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) On CPUs that support the SVE2 extensions, this option will enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) those too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) Note that for architectural reasons, firmware _must_ implement SVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788) support when running on SVE capable hardware. The required support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) is present in:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) * version 1.5 and later of the ARM Trusted Firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) * the AArch64 boot wrapper since commit 5e1261e08abf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793) ("bootwrapper: SVE: Enable SVE for EL2 and below").
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795) For other firmware implementations, consult the firmware documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) or vendor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) If you need the kernel to boot on SVE-capable hardware with broken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) firmware, you may need to say N here until you get your firmware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) fixed. Otherwise, you may experience firmware panics or lockups when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) booting the kernel. If unsure and you are not observing these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) symptoms, you should assume that it is safe to say Y.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) config ARM64_MODULE_PLTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) bool "Use PLTs to allow module memory to spill over into vmalloc area"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) depends on MODULES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) select HAVE_MOD_ARCH_SPECIFIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) Allocate PLTs when loading modules so that jumps and calls whose
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) targets are too far away for their relative offsets to be encoded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) in the instructions themselves can be bounced via veneers in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) module's PLT. This allows modules to be allocated in the generic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) vmalloc area after the dedicated module memory area has been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814) exhausted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) When running with address space randomization (KASLR), the module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) region itself may be too far away for ordinary relative jumps and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) calls, and so in that case, module PLTs are required and cannot be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819) disabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) Specific errata workaround(s) might also force module PLTs to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) enabled (ARM64_ERRATUM_843419).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) config ARM64_PSEUDO_NMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) bool "Support for NMI-like interrupts"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) select ARM_GIC_V3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) Adds support for mimicking Non-Maskable Interrupts through the use of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) GIC interrupt priority. This support requires version 3 or later of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) ARM GIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) This high priority configuration for interrupts needs to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) explicitly enabled by setting the kernel parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) "irqchip.gicv3_pseudo_nmi" to 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) If unsure, say N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) if ARM64_PSEUDO_NMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) config ARM64_DEBUG_PRIORITY_MASKING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) bool "Debug interrupt priority masking"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) This adds runtime checks to functions enabling/disabling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) interrupts when using priority masking. The additional checks verify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) the validity of ICC_PMR_EL1 when calling concerned functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) If unsure, say N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) config RELOCATABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) bool "Build a relocatable kernel image" if EXPERT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) select ARCH_HAS_RELR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) This builds the kernel as a Position Independent Executable (PIE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) which retains all relocation metadata required to relocate the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) kernel binary at runtime to a different virtual address than the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) address it was linked at.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) Since AArch64 uses the RELA relocation format, this requires a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) relocation pass at runtime even if the kernel is loaded at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) same address it was linked at.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) config RANDOMIZE_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) bool "Randomize the address of the kernel image"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) select ARM64_MODULE_PLTS if MODULES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) select RELOCATABLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) Randomizes the virtual address at which the kernel image is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) loaded, as a security feature that deters exploit attempts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) relying on knowledge of the location of kernel internals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) It is the bootloader's job to provide entropy, by passing a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) random u64 value in /chosen/kaslr-seed at kernel entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) When booting via the UEFI stub, it will invoke the firmware's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) EFI_RNG_PROTOCOL implementation (if available) to supply entropy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) to the kernel proper. In addition, it will randomise the physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) location of the kernel Image as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) If unsure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) config RANDOMIZE_MODULE_REGION_FULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) bool "Randomize the module region over a 4 GB range"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) depends on RANDOMIZE_BASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) Randomizes the location of the module region inside a 4 GB window
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) covering the core kernel. This way, it is less likely for modules
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) to leak information about the location of core kernel data structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889) but it does imply that function calls between modules and the core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) kernel will need to be resolved via veneers in the module PLT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892) When this option is not set, the module region will be randomized over
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) a limited range that contains the [_stext, _etext] interval of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894) core kernel, so branch relocations are always in range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) config CC_HAVE_STACKPROTECTOR_SYSREG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) def_bool $(cc-option,-mstack-protector-guard=sysreg -mstack-protector-guard-reg=sp_el0 -mstack-protector-guard-offset=0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) config STACKPROTECTOR_PER_TASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) depends on STACKPROTECTOR && CC_HAVE_STACKPROTECTOR_SYSREG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) menu "Boot options"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907) config ARM64_ACPI_PARKING_PROTOCOL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) bool "Enable support for the ARM64 ACPI parking protocol"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) depends on ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911) Enable support for the ARM64 ACPI parking protocol. If disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) the kernel will not allow booting through the ARM64 ACPI parking
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913) protocol even if the corresponding data is present in the ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) MADT table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) config CMDLINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917) string "Default kernel command string"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) default ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) Provide a set of default command-line options at build time by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921) entering them here. As a minimum, you should specify the the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922) root device (e.g. root=/dev/nfs).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925) prompt "Kernel command line type" if CMDLINE != ""
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) default CMDLINE_FROM_BOOTLOADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) Choose how the kernel will handle the provided default kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) command line string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) config CMDLINE_FROM_BOOTLOADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) bool "Use bootloader kernel arguments if available"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) Uses the command-line options passed by the boot loader. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) the boot loader doesn't provide any, the default kernel command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) string provided in CMDLINE will be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938) config CMDLINE_EXTEND
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) bool "Extend bootloader kernel arguments"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941) The command-line arguments provided by the boot loader will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) appended to the default kernel command string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944) config CMDLINE_FORCE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) bool "Always use the default kernel command string"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) Always use the default kernel command string, even if the boot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) loader passes other arguments to the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) This is useful if you cannot or don't want to change the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) command-line options your boot loader passes to the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) config EFI_STUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955) bool
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) config EFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958) bool "UEFI runtime support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) depends on OF && !CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) depends on KERNEL_MODE_NEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) select ARCH_SUPPORTS_ACPI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) select LIBFDT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) select UCS2_STRING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) select EFI_PARAMS_FROM_FDT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) select EFI_RUNTIME_WRAPPERS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) select EFI_STUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) select EFI_GENERIC_STUB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) This option provides support for runtime services provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) by UEFI firmware (such as non-volatile variables, realtime
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972) clock, and platform reset). A UEFI stub is also provided to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) allow the kernel to be booted as an EFI application. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) is only useful on systems that have UEFI firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) config DMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) bool "Enable support for SMBIOS (DMI) tables"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) depends on EFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) This enables SMBIOS/DMI feature for systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) This option is only useful on systems that have UEFI firmware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984) However, even with this option, the resultant kernel should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) continue to boot on existing non-UEFI platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) config SYSVIPC_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) depends on COMPAT && SYSVIPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) config ARCH_ENABLE_HUGEPAGE_MIGRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) depends on HUGETLB_PAGE && MIGRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) config ARCH_ENABLE_THP_MIGRATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) depends on TRANSPARENT_HUGEPAGE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) menu "Power management options"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) source "kernel/power/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005) config ARCH_HIBERNATION_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007) depends on CPU_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) config ARCH_HIBERNATION_HEADER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) depends on HIBERNATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013) config ARCH_SUSPEND_POSSIBLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) def_bool y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) menu "CPU Power Management"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) source "drivers/cpuidle/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) source "drivers/cpufreq/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) endmenu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) source "drivers/firmware/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) source "drivers/acpi/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) source "arch/arm64/kvm/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) if CRYPTO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033) source "arch/arm64/crypto/Kconfig"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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