^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/arch/arm/vfp/vfpsingle.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This code is derived in part from John R. Housers softfloat library, which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * carries the following notice:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * ===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This C source file is part of the SoftFloat IEC/IEEE Floating-point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Arithmetic Package, Release 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Written by John R. Hauser. This work was made possible in part by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * International Computer Science Institute, located at Suite 600, 1947 Center
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Street, Berkeley, California 94704. Funding was partially provided by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * National Science Foundation under grant MIP-9311980. The original version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * of this code was written as part of a project to build a fixed-point vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * processor in collaboration with the University of California at Berkeley,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * overseen by Profs. Nelson Morgan and John Wawrzynek. More information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * is available through the web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * arithmetic/softfloat.html'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Derivative works are acceptable, even for commercial purposes, so long as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * (1) they include prominent notice that the work is derivative, and (2) they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * include prominent notice akin to these three paragraphs for those parts of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * this code that are retained.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * ===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/div64.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/vfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "vfpinstr.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include "vfp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static struct vfp_single vfp_single_default_qnan = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .exponent = 255,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .sign = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .significand = VFP_SINGLE_SIGNIFICAND_QNAN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static void vfp_single_dump(const char *str, struct vfp_single *s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) pr_debug("VFP: %s: sign=%d exponent=%d significand=%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) str, s->sign != 0, s->exponent, s->significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static void vfp_single_normalise_denormal(struct vfp_single *vs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int bits = 31 - fls(vs->significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) vfp_single_dump("normalise_denormal: in", vs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) if (bits) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) vs->exponent -= bits - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) vs->significand <<= bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) vfp_single_dump("normalise_denormal: out", vs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #ifndef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define vfp_single_normaliseround(sd,vsd,fpscr,except,func) __vfp_single_normaliseround(sd,vsd,fpscr,except)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 __vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u32 vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions, const char *func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u32 significand, incr, rmode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) int exponent, shift, underflow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) vfp_single_dump("pack: in", vs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * Infinities and NaNs are a special case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (vs->exponent == 255 && (vs->significand == 0 || exceptions))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * Special-case zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (vs->significand == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) vs->exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) exponent = vs->exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) significand = vs->significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * Normalise first. Note that we shift the significand up to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * bit 31, so we have VFP_SINGLE_LOW_BITS + 1 below the least
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * significant bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) shift = 32 - fls(significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (shift < 32 && shift) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) exponent -= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) significand <<= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) vs->exponent = exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) vs->significand = significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) vfp_single_dump("pack: normalised", vs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * Tiny number?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) underflow = exponent < 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (underflow) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) significand = vfp_shiftright32jamming(significand, -exponent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) vs->exponent = exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) vs->significand = significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) vfp_single_dump("pack: tiny number", vs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (!(significand & ((1 << (VFP_SINGLE_LOW_BITS + 1)) - 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) underflow = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * Select rounding increment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) rmode = fpscr & FPSCR_RMODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (rmode == FPSCR_ROUND_NEAREST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) incr = 1 << VFP_SINGLE_LOW_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if ((significand & (1 << (VFP_SINGLE_LOW_BITS + 1))) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) incr -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) } else if (rmode == FPSCR_ROUND_TOZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vs->sign != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) incr = (1 << (VFP_SINGLE_LOW_BITS + 1)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) pr_debug("VFP: rounding increment = 0x%08x\n", incr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * Is our rounding going to overflow?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if ((significand + incr) < significand) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) exponent += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) significand = (significand >> 1) | (significand & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) incr >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) vs->exponent = exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) vs->significand = significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) vfp_single_dump("pack: overflow", vs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * If any of the low bits (which will be shifted out of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * number) are non-zero, the result is inexact.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (significand & ((1 << (VFP_SINGLE_LOW_BITS + 1)) - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * Do our rounding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) significand += incr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * Infinity?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (exponent >= 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) exceptions |= FPSCR_OFC | FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) if (incr == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) vs->exponent = 253;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) vs->significand = 0x7fffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) vs->exponent = 255; /* infinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) vs->significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (significand >> (VFP_SINGLE_LOW_BITS + 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) if (exponent || significand > 0x80000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) underflow = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (underflow)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) exceptions |= FPSCR_UFC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) vs->exponent = exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) vs->significand = significand >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) pack:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) vfp_single_dump("pack: final", vs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) s32 d = vfp_single_pack(vs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) pr_debug("VFP: %s: d(s%d)=%08x exceptions=%08x\n", func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) sd, d, exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) vfp_put_float(d, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * Propagate the NaN, setting exceptions if it is signalling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * 'n' is always a NaN. 'm' may be a number, NaN or infinity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) vfp_propagate_nan(struct vfp_single *vsd, struct vfp_single *vsn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct vfp_single *vsm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct vfp_single *nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) int tn, tm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) tn = vfp_single_type(vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (vsm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) tm = vfp_single_type(vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (fpscr & FPSCR_DEFAULT_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * Default NaN mode - always returns a quiet NaN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) nan = &vfp_single_default_qnan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * Contemporary mode - select the first signalling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * NAN, or if neither are signalling, the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * quiet NAN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (tn == VFP_SNAN || (tm != VFP_SNAN && tn == VFP_QNAN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) nan = vsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) nan = vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * Make the NaN quiet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) nan->significand |= VFP_SINGLE_SIGNIFICAND_QNAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) *vsd = *nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * If one was a signalling NAN, raise invalid operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return tn == VFP_SNAN || tm == VFP_SNAN ? FPSCR_IOC : VFP_NAN_FLAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * Extended operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static u32 vfp_single_fabs(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) vfp_put_float(vfp_single_packed_abs(m), sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static u32 vfp_single_fcpy(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) vfp_put_float(m, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static u32 vfp_single_fneg(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) vfp_put_float(vfp_single_packed_negate(m), sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) static const u16 sqrt_oddadjust[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 0x0004, 0x0022, 0x005d, 0x00b1, 0x011d, 0x019f, 0x0236, 0x02e0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 0x039c, 0x0468, 0x0545, 0x0631, 0x072b, 0x0832, 0x0946, 0x0a67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) static const u16 sqrt_evenadjust[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 0x0a2d, 0x08af, 0x075a, 0x0629, 0x051a, 0x0429, 0x0356, 0x029e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 0x0200, 0x0179, 0x0109, 0x00af, 0x0068, 0x0034, 0x0012, 0x0002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u32 vfp_estimate_sqrt_significand(u32 exponent, u32 significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u32 z, a;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if ((significand & 0xc0000000) != 0x40000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) pr_warn("VFP: estimate_sqrt: invalid significand\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) a = significand << 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) index = (a >> 27) & 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (exponent & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) z = 0x4000 + (a >> 17) - sqrt_oddadjust[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) z = ((a / z) << 14) + (z << 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) a >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) z = 0x8000 + (a >> 17) - sqrt_evenadjust[index];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) z = a / z + z;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) z = (z >= 0x20000) ? 0xffff8000 : (z << 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if (z <= a)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return (s32)a >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) u64 v = (u64)a << 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) do_div(v, z);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return v + (z >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) static u32 vfp_single_fsqrt(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) struct vfp_single vsm, vsd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) int ret, tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) tm = vfp_single_type(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) if (tm & (VFP_NAN|VFP_INFINITY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) struct vfp_single *vsp = &vsd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) if (tm & VFP_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ret = vfp_propagate_nan(vsp, &vsm, NULL, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) else if (vsm.sign == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) sqrt_copy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) vsp = &vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) sqrt_invalid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) vsp = &vfp_single_default_qnan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ret = FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) vfp_put_float(vfp_single_pack(vsp), sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * sqrt(+/- 0) == +/- 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) if (tm & VFP_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) goto sqrt_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * Normalise a denormalised number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) vfp_single_normalise_denormal(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * sqrt(<0) = invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (vsm.sign)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) goto sqrt_invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) vfp_single_dump("sqrt", &vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * Estimate the square root.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) vsd.sign = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) vsd.exponent = ((vsm.exponent - 127) >> 1) + 127;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) vsd.significand = vfp_estimate_sqrt_significand(vsm.exponent, vsm.significand) + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) vfp_single_dump("sqrt estimate", &vsd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * And now adjust.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if ((vsd.significand & VFP_SINGLE_LOW_BITS_MASK) <= 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (vsd.significand < 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) vsd.significand = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) u64 term;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) s64 rem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) vsm.significand <<= !(vsm.exponent & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) term = (u64)vsd.significand * vsd.significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) rem = ((u64)vsm.significand << 32) - term;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) pr_debug("VFP: term=%016llx rem=%016llx\n", term, rem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) while (rem < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) vsd.significand -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) rem += ((u64)vsd.significand << 1) | 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) vsd.significand |= rem != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) vsd.significand = vfp_shiftright32jamming(vsd.significand, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return vfp_single_normaliseround(sd, &vsd, fpscr, 0, "fsqrt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * Equal := ZC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * Less than := N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * Greater than := C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * Unordered := CV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static u32 vfp_compare(int sd, int signal_on_qnan, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) s32 d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) u32 ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) d = vfp_get_float(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (vfp_single_packed_exponent(m) == 255 && vfp_single_packed_mantissa(m)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) ret |= FPSCR_C | FPSCR_V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (signal_on_qnan || !(vfp_single_packed_mantissa(m) & (1 << (VFP_SINGLE_MANTISSA_BITS - 1))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * Signalling NaN, or signalling on quiet NaN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) ret |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) if (vfp_single_packed_exponent(d) == 255 && vfp_single_packed_mantissa(d)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) ret |= FPSCR_C | FPSCR_V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (signal_on_qnan || !(vfp_single_packed_mantissa(d) & (1 << (VFP_SINGLE_MANTISSA_BITS - 1))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) * Signalling NaN, or signalling on quiet NaN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ret |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (ret == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (d == m || vfp_single_packed_abs(d | m) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) * equal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) ret |= FPSCR_Z | FPSCR_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) } else if (vfp_single_packed_sign(d ^ m)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * different signs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) if (vfp_single_packed_sign(d))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) * d is negative, so d < m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ret |= FPSCR_N;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) * d is positive, so d > m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) ret |= FPSCR_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) } else if ((vfp_single_packed_sign(d) != 0) ^ (d < m)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * d < m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) ret |= FPSCR_N;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) } else if ((vfp_single_packed_sign(d) != 0) ^ (d > m)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) * d > m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) ret |= FPSCR_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) static u32 vfp_single_fcmp(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) return vfp_compare(sd, 0, m, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static u32 vfp_single_fcmpe(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return vfp_compare(sd, 1, m, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static u32 vfp_single_fcmpz(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) return vfp_compare(sd, 0, 0, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static u32 vfp_single_fcmpez(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return vfp_compare(sd, 1, 0, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static u32 vfp_single_fcvtd(int dd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) struct vfp_single vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct vfp_double vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) int tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) u32 exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) tm = vfp_single_type(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) * If we have a signalling NaN, signal invalid operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) if (tm == VFP_SNAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) exceptions = FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) vfp_single_normalise_denormal(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) vdd.sign = vsm.sign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) vdd.significand = (u64)vsm.significand << 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) * If we have an infinity or NaN, the exponent must be 2047.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (tm & (VFP_INFINITY|VFP_NAN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) vdd.exponent = 2047;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (tm == VFP_QNAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) vdd.significand |= VFP_DOUBLE_SIGNIFICAND_QNAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) goto pack_nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) } else if (tm & VFP_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) vdd.exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) vdd.exponent = vsm.exponent + (1023 - 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fcvtd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) pack_nan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) vfp_put_double(vfp_double_pack(&vdd), dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) static u32 vfp_single_fuito(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) struct vfp_single vs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) vs.sign = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) vs.exponent = 127 + 31 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) vs.significand = (u32)m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return vfp_single_normaliseround(sd, &vs, fpscr, 0, "fuito");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) static u32 vfp_single_fsito(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) struct vfp_single vs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) vs.sign = (m & 0x80000000) >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) vs.exponent = 127 + 31 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) vs.significand = vs.sign ? -m : m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) return vfp_single_normaliseround(sd, &vs, fpscr, 0, "fsito");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) static u32 vfp_single_ftoui(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct vfp_single vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) u32 d, exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) int rmode = fpscr & FPSCR_RMODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) int tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) vfp_single_dump("VSM", &vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * Do we have a denormalised number?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) tm = vfp_single_type(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) exceptions |= FPSCR_IDC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (tm & VFP_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) vsm.sign = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) if (vsm.exponent >= 127 + 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) d = vsm.sign ? 0 : 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) exceptions = FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) } else if (vsm.exponent >= 127 - 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) int shift = 127 + 31 - vsm.exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) u32 rem, incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) * 2^0 <= m < 2^32-2^8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) d = (vsm.significand << 1) >> shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) rem = vsm.significand << (33 - shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) if (rmode == FPSCR_ROUND_NEAREST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) incr = 0x80000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if ((d & 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) incr -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) } else if (rmode == FPSCR_ROUND_TOZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vsm.sign != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) incr = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if ((rem + incr) < rem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) if (d < 0xffffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) d += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) if (d && vsm.sign) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) } else if (rem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (vsm.exponent | vsm.significand) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (rmode == FPSCR_ROUND_PLUSINF && vsm.sign == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) d = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) else if (rmode == FPSCR_ROUND_MINUSINF && vsm.sign) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) vfp_put_float(d, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) static u32 vfp_single_ftouiz(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) return vfp_single_ftoui(sd, unused, m, FPSCR_ROUND_TOZERO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static u32 vfp_single_ftosi(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) struct vfp_single vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) u32 d, exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) int rmode = fpscr & FPSCR_RMODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) int tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) vfp_single_dump("VSM", &vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) * Do we have a denormalised number?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) tm = vfp_single_type(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (vfp_single_type(&vsm) & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) exceptions |= FPSCR_IDC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (tm & VFP_NAN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) } else if (vsm.exponent >= 127 + 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) * m >= 2^31-2^7: invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) d = 0x7fffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (vsm.sign)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) d = ~d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) } else if (vsm.exponent >= 127 - 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) int shift = 127 + 31 - vsm.exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) u32 rem, incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) /* 2^0 <= m <= 2^31-2^7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) d = (vsm.significand << 1) >> shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) rem = vsm.significand << (33 - shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) if (rmode == FPSCR_ROUND_NEAREST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) incr = 0x80000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if ((d & 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) incr -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) } else if (rmode == FPSCR_ROUND_TOZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vsm.sign != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) incr = ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) if ((rem + incr) < rem && d < 0xffffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) d += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) if (d > 0x7fffffff + (vsm.sign != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) d = 0x7fffffff + (vsm.sign != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) } else if (rem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) if (vsm.sign)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) d = -d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) if (vsm.exponent | vsm.significand) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if (rmode == FPSCR_ROUND_PLUSINF && vsm.sign == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) d = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) else if (rmode == FPSCR_ROUND_MINUSINF && vsm.sign)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) d = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) vfp_put_float((s32)d, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) static u32 vfp_single_ftosiz(int sd, int unused, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) return vfp_single_ftosi(sd, unused, m, FPSCR_ROUND_TOZERO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) static struct op fops_ext[32] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) [FEXT_TO_IDX(FEXT_FCPY)] = { vfp_single_fcpy, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) [FEXT_TO_IDX(FEXT_FABS)] = { vfp_single_fabs, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) [FEXT_TO_IDX(FEXT_FNEG)] = { vfp_single_fneg, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) [FEXT_TO_IDX(FEXT_FSQRT)] = { vfp_single_fsqrt, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) [FEXT_TO_IDX(FEXT_FCMP)] = { vfp_single_fcmp, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) [FEXT_TO_IDX(FEXT_FCMPE)] = { vfp_single_fcmpe, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) [FEXT_TO_IDX(FEXT_FCMPZ)] = { vfp_single_fcmpz, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) [FEXT_TO_IDX(FEXT_FCMPEZ)] = { vfp_single_fcmpez, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) [FEXT_TO_IDX(FEXT_FCVT)] = { vfp_single_fcvtd, OP_SCALAR|OP_DD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) [FEXT_TO_IDX(FEXT_FUITO)] = { vfp_single_fuito, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) [FEXT_TO_IDX(FEXT_FSITO)] = { vfp_single_fsito, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) [FEXT_TO_IDX(FEXT_FTOUI)] = { vfp_single_ftoui, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) [FEXT_TO_IDX(FEXT_FTOUIZ)] = { vfp_single_ftouiz, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) [FEXT_TO_IDX(FEXT_FTOSI)] = { vfp_single_ftosi, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) [FEXT_TO_IDX(FEXT_FTOSIZ)] = { vfp_single_ftosiz, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) vfp_single_fadd_nonnumber(struct vfp_single *vsd, struct vfp_single *vsn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) struct vfp_single *vsm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) struct vfp_single *vsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) u32 exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) int tn, tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) tn = vfp_single_type(vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) tm = vfp_single_type(vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) if (tn & tm & VFP_INFINITY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) * Two infinities. Are they different signs?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if (vsn->sign ^ vsm->sign) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * different signs -> invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) exceptions = FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) vsp = &vfp_single_default_qnan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * same signs -> valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) vsp = vsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) } else if (tn & VFP_INFINITY && tm & VFP_NUMBER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * One infinity and one number -> infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) vsp = vsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) * 'n' is a NaN of some type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) return vfp_propagate_nan(vsd, vsn, vsm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) *vsd = *vsp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) vfp_single_add(struct vfp_single *vsd, struct vfp_single *vsn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) struct vfp_single *vsm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) u32 exp_diff, m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) if (vsn->significand & 0x80000000 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) vsm->significand & 0x80000000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) pr_info("VFP: bad FP values in %s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) vfp_single_dump("VSN", vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) vfp_single_dump("VSM", vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) * Ensure that 'n' is the largest magnitude number. Note that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) * if 'n' and 'm' have equal exponents, we do not swap them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) * This ensures that NaN propagation works correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) if (vsn->exponent < vsm->exponent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) struct vfp_single *t = vsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) vsn = vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) vsm = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) * Is 'n' an infinity or a NaN? Note that 'm' may be a number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) * infinity or a NaN here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (vsn->exponent == 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) return vfp_single_fadd_nonnumber(vsd, vsn, vsm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) * We have two proper numbers, where 'vsn' is the larger magnitude.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) * Copy 'n' to 'd' before doing the arithmetic.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) *vsd = *vsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) * Align both numbers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) exp_diff = vsn->exponent - vsm->exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) m_sig = vfp_shiftright32jamming(vsm->significand, exp_diff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) * If the signs are different, we are really subtracting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (vsn->sign ^ vsm->sign) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) m_sig = vsn->significand - m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) if ((s32)m_sig < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) vsd->sign = vfp_sign_negate(vsd->sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) m_sig = -m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) } else if (m_sig == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) vsd->sign = (fpscr & FPSCR_RMODE_MASK) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) FPSCR_ROUND_MINUSINF ? 0x8000 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) m_sig = vsn->significand + m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) vsd->significand = m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) vfp_single_multiply(struct vfp_single *vsd, struct vfp_single *vsn, struct vfp_single *vsm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) vfp_single_dump("VSN", vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) vfp_single_dump("VSM", vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) * Ensure that 'n' is the largest magnitude number. Note that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) * if 'n' and 'm' have equal exponents, we do not swap them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) * This ensures that NaN propagation works correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) if (vsn->exponent < vsm->exponent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) struct vfp_single *t = vsn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) vsn = vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) vsm = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) pr_debug("VFP: swapping M <-> N\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) vsd->sign = vsn->sign ^ vsm->sign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) * If 'n' is an infinity or NaN, handle it. 'm' may be anything.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) if (vsn->exponent == 255) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) if (vsn->significand || (vsm->exponent == 255 && vsm->significand))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) return vfp_propagate_nan(vsd, vsn, vsm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) if ((vsm->exponent | vsm->significand) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) *vsd = vfp_single_default_qnan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) return FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) vsd->exponent = vsn->exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) vsd->significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) * If 'm' is zero, the result is always zero. In this case,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * 'n' may be zero or a number, but it doesn't matter which.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) if ((vsm->exponent | vsm->significand) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) vsd->exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) vsd->significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) * We add 2 to the destination exponent for the same reason as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) * the addition case - though this time we have +1 from each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) * input operand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) vsd->exponent = vsn->exponent + vsm->exponent - 127 + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) vsd->significand = vfp_hi64to32jamming((u64)vsn->significand * vsm->significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) vfp_single_dump("VSD", vsd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) #define NEG_MULTIPLY (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) #define NEG_SUBTRACT (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) vfp_single_multiply_accumulate(int sd, int sn, s32 m, u32 fpscr, u32 negate, char *func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) struct vfp_single vsd, vsp, vsn, vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) s32 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) v = vfp_get_float(sn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) pr_debug("VFP: s%u = %08x\n", sn, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) vfp_single_unpack(&vsn, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) if (vsn.exponent == 0 && vsn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) vfp_single_normalise_denormal(&vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) if (vsm.exponent == 0 && vsm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) vfp_single_normalise_denormal(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) exceptions = vfp_single_multiply(&vsp, &vsn, &vsm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) if (negate & NEG_MULTIPLY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) vsp.sign = vfp_sign_negate(vsp.sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) v = vfp_get_float(sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) pr_debug("VFP: s%u = %08x\n", sd, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) vfp_single_unpack(&vsn, v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) if (vsn.exponent == 0 && vsn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) vfp_single_normalise_denormal(&vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) if (negate & NEG_SUBTRACT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) vsn.sign = vfp_sign_negate(vsn.sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) exceptions |= vfp_single_add(&vsd, &vsn, &vsp, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) * Standard operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) * sd = sd + (sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) static u32 vfp_single_fmac(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) return vfp_single_multiply_accumulate(sd, sn, m, fpscr, 0, "fmac");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) * sd = sd - (sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) static u32 vfp_single_fnmac(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) return vfp_single_multiply_accumulate(sd, sn, m, fpscr, NEG_MULTIPLY, "fnmac");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) * sd = -sd + (sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) static u32 vfp_single_fmsc(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) return vfp_single_multiply_accumulate(sd, sn, m, fpscr, NEG_SUBTRACT, "fmsc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) * sd = -sd - (sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) static u32 vfp_single_fnmsc(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) return vfp_single_multiply_accumulate(sd, sn, m, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, "fnmsc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) * sd = sn * sm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) static u32 vfp_single_fmul(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) struct vfp_single vsd, vsn, vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) s32 n = vfp_get_float(sn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) pr_debug("VFP: s%u = %08x\n", sn, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) vfp_single_unpack(&vsn, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) if (vsn.exponent == 0 && vsn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) vfp_single_normalise_denormal(&vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) if (vsm.exponent == 0 && vsm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) vfp_single_normalise_denormal(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) exceptions = vfp_single_multiply(&vsd, &vsn, &vsm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fmul");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) * sd = -(sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) static u32 vfp_single_fnmul(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) struct vfp_single vsd, vsn, vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) s32 n = vfp_get_float(sn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) pr_debug("VFP: s%u = %08x\n", sn, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) vfp_single_unpack(&vsn, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) if (vsn.exponent == 0 && vsn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) vfp_single_normalise_denormal(&vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) if (vsm.exponent == 0 && vsm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) vfp_single_normalise_denormal(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) exceptions = vfp_single_multiply(&vsd, &vsn, &vsm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) vsd.sign = vfp_sign_negate(vsd.sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fnmul");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) * sd = sn + sm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) static u32 vfp_single_fadd(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) struct vfp_single vsd, vsn, vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) s32 n = vfp_get_float(sn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) pr_debug("VFP: s%u = %08x\n", sn, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) * Unpack and normalise denormals.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) vfp_single_unpack(&vsn, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) if (vsn.exponent == 0 && vsn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) vfp_single_normalise_denormal(&vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) if (vsm.exponent == 0 && vsm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) vfp_single_normalise_denormal(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) exceptions = vfp_single_add(&vsd, &vsn, &vsm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fadd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) * sd = sn - sm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) static u32 vfp_single_fsub(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) * Subtraction is addition with one sign inverted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) return vfp_single_fadd(sd, sn, vfp_single_packed_negate(m), fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) * sd = sn / sm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) static u32 vfp_single_fdiv(int sd, int sn, s32 m, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) struct vfp_single vsd, vsn, vsm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) u32 exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) s32 n = vfp_get_float(sn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) int tm, tn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) pr_debug("VFP: s%u = %08x\n", sn, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) vfp_single_unpack(&vsn, n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) vfp_single_unpack(&vsm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) vsd.sign = vsn.sign ^ vsm.sign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) tn = vfp_single_type(&vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) tm = vfp_single_type(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) * Is n a NAN?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) if (tn & VFP_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) goto vsn_nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) * Is m a NAN?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) if (tm & VFP_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) goto vsm_nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) * If n and m are infinity, the result is invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) * If n and m are zero, the result is invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) if (tm & tn & (VFP_INFINITY|VFP_ZERO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) goto invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) * If n is infinity, the result is infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) if (tn & VFP_INFINITY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) goto infinity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) * If m is zero, raise div0 exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) if (tm & VFP_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) goto divzero;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) * If m is infinity, or n is zero, the result is zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) if (tm & VFP_INFINITY || tn & VFP_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) goto zero;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) if (tn & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) vfp_single_normalise_denormal(&vsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) vfp_single_normalise_denormal(&vsm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) * Ok, we have two numbers, we can perform division.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) vsd.exponent = vsn.exponent - vsm.exponent + 127 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) vsm.significand <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) if (vsm.significand <= (2 * vsn.significand)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) vsn.significand >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) vsd.exponent++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) u64 significand = (u64)vsn.significand << 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) do_div(significand, vsm.significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) vsd.significand = significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) if ((vsd.significand & 0x3f) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) vsd.significand |= ((u64)vsm.significand * vsd.significand != (u64)vsn.significand << 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) return vfp_single_normaliseround(sd, &vsd, fpscr, 0, "fdiv");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) vsn_nan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) exceptions = vfp_propagate_nan(&vsd, &vsn, &vsm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) pack:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) vfp_put_float(vfp_single_pack(&vsd), sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) vsm_nan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) exceptions = vfp_propagate_nan(&vsd, &vsm, &vsn, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) zero:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) vsd.exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) vsd.significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) divzero:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) exceptions = FPSCR_DZC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) infinity:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) vsd.exponent = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) vsd.significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) invalid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) vfp_put_float(vfp_single_pack(&vfp_single_default_qnan), sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) return FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) static struct op fops[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) [FOP_TO_IDX(FOP_FMAC)] = { vfp_single_fmac, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) [FOP_TO_IDX(FOP_FNMAC)] = { vfp_single_fnmac, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) [FOP_TO_IDX(FOP_FMSC)] = { vfp_single_fmsc, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) [FOP_TO_IDX(FOP_FNMSC)] = { vfp_single_fnmsc, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) [FOP_TO_IDX(FOP_FMUL)] = { vfp_single_fmul, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) [FOP_TO_IDX(FOP_FNMUL)] = { vfp_single_fnmul, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) [FOP_TO_IDX(FOP_FADD)] = { vfp_single_fadd, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) [FOP_TO_IDX(FOP_FSUB)] = { vfp_single_fsub, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) [FOP_TO_IDX(FOP_FDIV)] = { vfp_single_fdiv, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) #define FREG_BANK(x) ((x) & 0x18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) #define FREG_IDX(x) ((x) & 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) u32 vfp_single_cpdo(u32 inst, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) u32 op = inst & FOP_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) u32 exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176) unsigned int dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) unsigned int sn = vfp_get_sn(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) unsigned int sm = vfp_get_sm(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) unsigned int vecitr, veclen, vecstride;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) struct op *fop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) vecstride = 1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) fop = (op == FOP_EXT) ? &fops_ext[FEXT_TO_IDX(inst)] : &fops[FOP_TO_IDX(op)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) * fcvtsd takes a dN register number as destination, not sN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) * Technically, if bit 0 of dd is set, this is an invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) * instruction. However, we ignore this for efficiency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) * It also only operates on scalars.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) if (fop->flags & OP_DD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) dest = vfp_get_dd(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) dest = vfp_get_sd(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) * If destination bank is zero, vector length is always '1'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) * ARM DDI0100F C5.1.3, C5.3.2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) if ((fop->flags & OP_SCALAR) || FREG_BANK(dest) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) veclen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) veclen = fpscr & FPSCR_LENGTH_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) (veclen >> FPSCR_LENGTH_BIT) + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) if (!fop->fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) goto invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) s32 m = vfp_get_float(sm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) u32 except;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) char type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) type = fop->flags & OP_DD ? 'd' : 's';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) if (op == FOP_EXT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) pr_debug("VFP: itr%d (%c%u) = op[%u] (s%u=%08x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) vecitr >> FPSCR_LENGTH_BIT, type, dest, sn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) sm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) pr_debug("VFP: itr%d (%c%u) = (s%u) op[%u] (s%u=%08x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) vecitr >> FPSCR_LENGTH_BIT, type, dest, sn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) FOP_TO_IDX(op), sm, m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) except = fop->fn(dest, sn, m, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) pr_debug("VFP: itr%d: exceptions=%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) vecitr >> FPSCR_LENGTH_BIT, except);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) exceptions |= except;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) * CHECK: It appears to be undefined whether we stop when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) * we encounter an exception. We continue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) dest = FREG_BANK(dest) + ((FREG_IDX(dest) + vecstride) & 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) sn = FREG_BANK(sn) + ((FREG_IDX(sn) + vecstride) & 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) if (FREG_BANK(sm) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) sm = FREG_BANK(sm) + ((FREG_IDX(sm) + vecstride) & 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) invalid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) return (u32)-1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags