^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/vfp/vfpmodule.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2004 ARM Limited.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Written by Deep Blue Solutions Limited.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/cpu_pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/hardirq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/notifier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/sched/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/user.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/cp15.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/cputype.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/system_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/thread_notify.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/traps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/vfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include "vfpinstr.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include "vfp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * Our undef handlers (in entry.S)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) asmlinkage void vfp_support_entry(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) asmlinkage void vfp_null_entry(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) asmlinkage void (*vfp_vector)(void) = vfp_null_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * Dual-use variable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Used in startup: set to non-zero if VFP checks fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * After startup, holds VFP architecture
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static unsigned int __initdata VFP_arch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * The pointer to the vfpstate structure of the thread which currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * owns the context held in the VFP hardware, or NULL if the hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * context is invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * For UP, this is sufficient to tell which thread owns the VFP context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * However, for SMP, we also need to check the CPU number stored in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * saved state too to catch migrations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) union vfp_state *vfp_current_hw_state[NR_CPUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * Is 'thread's most up to date state stored in this CPUs hardware?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * Must be called from non-preemptible context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static bool vfp_state_in_hw(unsigned int cpu, struct thread_info *thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (thread->vfpstate.hard.cpu != cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return vfp_current_hw_state[cpu] == &thread->vfpstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * Force a reload of the VFP context from the thread structure. We do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * this by ensuring that access to the VFP hardware is disabled, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * clear vfp_current_hw_state. Must be called from non-preemptible context.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void vfp_force_reload(unsigned int cpu, struct thread_info *thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (vfp_state_in_hw(cpu, thread)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) vfp_current_hw_state[cpu] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) thread->vfpstate.hard.cpu = NR_CPUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * Per-thread VFP initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static void vfp_thread_flush(struct thread_info *thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) union vfp_state *vfp = &thread->vfpstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * Disable VFP to ensure we initialize it first. We must ensure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * that the modification of vfp_current_hw_state[] and hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * disable are done for the same CPU and without preemption.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * Do this first to ensure that preemption won't overwrite our
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * state saving should access to the VFP be enabled at this point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) cpu = get_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (vfp_current_hw_state[cpu] == vfp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) vfp_current_hw_state[cpu] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) put_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) memset(vfp, 0, sizeof(union vfp_state));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) vfp->hard.fpexc = FPEXC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) vfp->hard.fpscr = FPSCR_ROUND_NEAREST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) vfp->hard.cpu = NR_CPUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static void vfp_thread_exit(struct thread_info *thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* release case: Per-thread VFP cleanup. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) union vfp_state *vfp = &thread->vfpstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) unsigned int cpu = get_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (vfp_current_hw_state[cpu] == vfp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) vfp_current_hw_state[cpu] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) put_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static void vfp_thread_copy(struct thread_info *thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct thread_info *parent = current_thread_info();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) vfp_sync_hwstate(parent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) thread->vfpstate = parent->vfpstate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) thread->vfpstate.hard.cpu = NR_CPUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * When this function is called with the following 'cmd's, the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * is true while this function is being run:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * THREAD_NOFTIFY_SWTICH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * - the previously running thread will not be scheduled onto another CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * - the next thread to be run (v) will not be running on another CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * - thread->cpu is the local CPU number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * - not preemptible as we're called in the middle of a thread switch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * THREAD_NOTIFY_FLUSH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * - the thread (v) will be running on the local CPU, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * v === current_thread_info()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * - thread->cpu is the local CPU number at the time it is accessed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * but may change at any time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * - we could be preempted if tree preempt rcu is enabled, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * it is unsafe to use thread->cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * THREAD_NOTIFY_EXIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * - we could be preempted if tree preempt rcu is enabled, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * it is unsafe to use thread->cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct thread_info *thread = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) u32 fpexc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) case THREAD_NOTIFY_SWITCH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) fpexc = fmrx(FPEXC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) cpu = thread->cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * On SMP, if VFP is enabled, save the old state in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * case the thread migrates to a different CPU. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * restoring is done lazily.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if ((fpexc & FPEXC_EN) && vfp_current_hw_state[cpu])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) vfp_save_state(vfp_current_hw_state[cpu], fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * Always disable VFP so we can lazily save/restore the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * old state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) fmxr(FPEXC, fpexc & ~FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) case THREAD_NOTIFY_FLUSH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) vfp_thread_flush(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) case THREAD_NOTIFY_EXIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) vfp_thread_exit(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) case THREAD_NOTIFY_COPY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) vfp_thread_copy(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) return NOTIFY_DONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static struct notifier_block vfp_notifier_block = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .notifier_call = vfp_notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * Raise a SIGFPE for the current process.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * sicode describes the signal being raised.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * This is the same as NWFPE, because it's not clear what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * this is used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) current->thread.error_code = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) current->thread.trap_no = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) send_sig_fault(SIGFPE, sicode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) (void __user *)(instruction_pointer(regs) - 4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) current);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static void vfp_panic(char *reason, u32 inst)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) pr_err("VFP: Error: %s\n", reason);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) pr_err("VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) fmrx(FPEXC), fmrx(FPSCR), inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) for (i = 0; i < 32; i += 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) pr_err("VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) i, vfp_get_float(i), i+1, vfp_get_float(i+1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * Process bitmask of exception conditions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) int si_code = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) pr_debug("VFP: raising exceptions %08x\n", exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (exceptions == VFP_EXCEPTION_ERROR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) vfp_panic("unhandled bounce", inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) vfp_raise_sigfpe(FPE_FLTINV, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * If any of the status flags are set, update the FPSCR.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * Comparison instructions always return at least one of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * these flags set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) fpscr |= exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) fmxr(FPSCR, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #define RAISE(stat,en,sig) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (exceptions & stat && fpscr & en) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) si_code = sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * These are arranged in priority order, least to highest.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) RAISE(FPSCR_DZC, FPSCR_DZE, FPE_FLTDIV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) RAISE(FPSCR_IXC, FPSCR_IXE, FPE_FLTRES);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) RAISE(FPSCR_UFC, FPSCR_UFE, FPE_FLTUND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (si_code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) vfp_raise_sigfpe(si_code, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * Emulate a VFP instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) u32 exceptions = VFP_EXCEPTION_ERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (INST_CPRTDO(inst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (!INST_CPRT(inst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * CPDO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (vfp_single(inst)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) exceptions = vfp_single_cpdo(inst, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) exceptions = vfp_double_cpdo(inst, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) * A CPRT instruction can not appear in FPINST2, nor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * can it cause an exception. Therefore, we do not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * have to emulate it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * A CPDT instruction can not appear in FPINST2, nor can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * it cause an exception. Therefore, we do not have to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * emulate it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return exceptions & ~VFP_NAN_FLAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * Package up a bounce condition.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) u32 fpscr, orig_fpscr, fpsid, exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) * At this point, FPEXC can have the following configuration:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) * EX DEX IXE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) * 0 1 x - synchronous exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * 1 x 0 - asynchronous exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * 0 0 1 - synchronous on VFP9 (non-standard subarch 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * implementation), undefined otherwise
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * Clear various bits and enable access to the VFP so we can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * handle the bounce.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) fpsid = fmrx(FPSID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) orig_fpscr = fpscr = fmrx(FPSCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * Check for the special VFP subarch 1 and FPSCR.IXE bit case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) && (fpscr & FPSCR_IXE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * Synchronous exception, emulate the trigger instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) goto emulate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) if (fpexc & FPEXC_EX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) #ifndef CONFIG_CPU_FEROCEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) * Asynchronous exception. The instruction is read from FPINST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) * and the interrupted instruction has to be restarted.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) trigger = fmrx(FPINST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) regs->ARM_pc -= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) } else if (!(fpexc & FPEXC_DEX)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) * Illegal combination of bits. It can be caused by an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * unallocated VFP instruction but with FPSCR.IXE set and not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * on VFP subarch 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * Modify fpscr to indicate the number of iterations remaining.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * whether FPEXC.VECITR or FPSCR.LEN is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (fpexc & (FPEXC_EX | FPEXC_VV)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) u32 len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) len = fpexc + (1 << FPEXC_LENGTH_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) fpscr &= ~FPSCR_LENGTH_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) fpscr |= (len & FPEXC_LENGTH_MASK) << (FPSCR_LENGTH_BIT - FPEXC_LENGTH_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * Handle the first FP instruction. We used to take note of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * FPEXC bounce reason, but this appears to be unreliable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * Emulate the bounced instruction instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (exceptions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * If there isn't a second FP instruction, exit now. Note that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) * The barrier() here prevents fpinst2 being read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * before the condition above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) trigger = fmrx(FPINST2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) emulate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (exceptions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) preempt_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) static void vfp_enable(void *unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) u32 access;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) BUG_ON(preemptible());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) access = get_copro_access();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) * Enable full access to VFP (cp10 and cp11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /* Called by platforms on which we want to disable VFP because it may not be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * present on all CPUs within a SMP complex. Needs to be called prior to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) * vfp_init().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) void __init vfp_disable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (VFP_arch) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) pr_debug("%s: should be called prior to vfp_init\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) VFP_arch = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #ifdef CONFIG_CPU_PM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static int vfp_pm_suspend(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) struct thread_info *ti = current_thread_info();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) u32 fpexc = fmrx(FPEXC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* if vfp is on, then save state for resumption */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) if (fpexc & FPEXC_EN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) pr_debug("%s: saving vfp state\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) vfp_save_state(&ti->vfpstate, fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* disable, just in case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) } else if (vfp_current_hw_state[ti->cpu]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) #ifndef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) fmxr(FPEXC, fpexc | FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) fmxr(FPEXC, fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /* clear any information we had about last context state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) vfp_current_hw_state[ti->cpu] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) static void vfp_pm_resume(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* ensure we have access to the vfp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) vfp_enable(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) /* and disable it to ensure the next usage restores the state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) static int vfp_cpu_pm_notifier(struct notifier_block *self, unsigned long cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) case CPU_PM_ENTER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) vfp_pm_suspend();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) case CPU_PM_ENTER_FAILED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) case CPU_PM_EXIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) vfp_pm_resume();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return NOTIFY_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static struct notifier_block vfp_cpu_pm_notifier_block = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .notifier_call = vfp_cpu_pm_notifier,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) static void vfp_pm_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) cpu_pm_register_notifier(&vfp_cpu_pm_notifier_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static inline void vfp_pm_init(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) #endif /* CONFIG_CPU_PM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) * Ensure that the VFP state stored in 'thread->vfpstate' is up to date
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) * with the hardware state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) void vfp_sync_hwstate(struct thread_info *thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) unsigned int cpu = get_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (vfp_state_in_hw(cpu, thread)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) u32 fpexc = fmrx(FPEXC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) * Save the last VFP state on this CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) fmxr(FPEXC, fpexc | FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) vfp_save_state(&thread->vfpstate, fpexc | FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) fmxr(FPEXC, fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) put_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) /* Ensure that the thread reloads the hardware VFP state on the next use. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) void vfp_flush_hwstate(struct thread_info *thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) unsigned int cpu = get_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) vfp_force_reload(cpu, thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) put_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * Save the current VFP state into the provided structures and prepare
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * for entry into a new function (signal handler).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) int vfp_preserve_user_clear_hwstate(struct user_vfp *ufp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct user_vfp_exc *ufp_exc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) struct thread_info *thread = current_thread_info();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /* Ensure that the saved hwstate is up-to-date. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) vfp_sync_hwstate(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * Copy the floating point registers. There can be unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) * registers see asm/hwcap.h for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) memcpy(&ufp->fpregs, &hwstate->fpregs, sizeof(hwstate->fpregs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) * Copy the status and control register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ufp->fpscr = hwstate->fpscr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * Copy the exception registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) ufp_exc->fpexc = hwstate->fpexc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) ufp_exc->fpinst = hwstate->fpinst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) ufp_exc->fpinst2 = hwstate->fpinst2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) /* Ensure that VFP is disabled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) vfp_flush_hwstate(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * As per the PCS, clear the length and stride bits for function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) * entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) /* Sanitise and restore the current VFP state from the provided structures. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) int vfp_restore_user_hwstate(struct user_vfp *ufp, struct user_vfp_exc *ufp_exc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) struct thread_info *thread = current_thread_info();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) struct vfp_hard_struct *hwstate = &thread->vfpstate.hard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) unsigned long fpexc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Disable VFP to avoid corrupting the new thread state. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) vfp_flush_hwstate(thread);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) * Copy the floating point registers. There can be unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) * registers see asm/hwcap.h for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) memcpy(&hwstate->fpregs, &ufp->fpregs, sizeof(hwstate->fpregs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) * Copy the status and control register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) hwstate->fpscr = ufp->fpscr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) * Sanitise and restore the exception registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) fpexc = ufp_exc->fpexc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) /* Ensure the VFP is enabled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) fpexc |= FPEXC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) /* Ensure FPINST2 is invalid and the exception flag is cleared. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) hwstate->fpexc = fpexc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) hwstate->fpinst = ufp_exc->fpinst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) hwstate->fpinst2 = ufp_exc->fpinst2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) * VFP hardware can lose all context when a CPU goes offline.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) * As we will be running in SMP mode with CPU hotplug, we will save the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) * hardware state at every thread switch. We clear our held state when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) * a CPU has been killed, indicating that the VFP hardware doesn't contain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) * a threads VFP state. When a CPU starts up, we re-enable access to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) * VFP hardware. The callbacks below are called on the CPU which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) * is being offlined/onlined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static int vfp_dying_cpu(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) vfp_current_hw_state[cpu] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static int vfp_starting_cpu(unsigned int unused)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) vfp_enable(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) #ifdef CONFIG_KERNEL_MODE_NEON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) static int vfp_kmode_exception(struct pt_regs *regs, unsigned int instr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) * If we reach this point, a floating point exception has been raised
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) * while running in kernel mode. If the NEON/VFP unit was enabled at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * time, it means a VFP instruction has been issued that requires
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * software assistance to complete, something which is not currently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * supported in kernel mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * If the NEON/VFP unit was disabled, and the location pointed to below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) * is properly preceded by a call to kernel_neon_begin(), something has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * caused the task to be scheduled out and back in again. In this case,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) * rebuilding and running with CONFIG_DEBUG_ATOMIC_SLEEP enabled should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * be helpful in localizing the problem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (fmrx(FPEXC) & FPEXC_EN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) pr_crit("BUG: unsupported FP instruction in kernel mode\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) pr_crit("BUG: FP instruction issued in kernel mode with FP unit disabled\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) pr_crit("FPEXC == 0x%08x\n", fmrx(FPEXC));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) static struct undef_hook vfp_kmode_exception_hook[] = {{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .instr_mask = 0xfe000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .instr_val = 0xf2000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) .cpsr_mask = MODE_MASK | PSR_T_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) .cpsr_val = SVC_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) .fn = vfp_kmode_exception,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) .instr_mask = 0xff100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .instr_val = 0xf4000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .cpsr_mask = MODE_MASK | PSR_T_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .cpsr_val = SVC_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .fn = vfp_kmode_exception,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) .instr_mask = 0xef000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .instr_val = 0xef000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .cpsr_mask = MODE_MASK | PSR_T_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .cpsr_val = SVC_MODE | PSR_T_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .fn = vfp_kmode_exception,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .instr_mask = 0xff100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) .instr_val = 0xf9000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .cpsr_mask = MODE_MASK | PSR_T_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .cpsr_val = SVC_MODE | PSR_T_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) .fn = vfp_kmode_exception,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) .instr_mask = 0x0c000e00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) .instr_val = 0x0c000a00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) .cpsr_mask = MODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) .cpsr_val = SVC_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) .fn = vfp_kmode_exception,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) }};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) static int __init vfp_kmode_exception_hook_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) for (i = 0; i < ARRAY_SIZE(vfp_kmode_exception_hook); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) register_undef_hook(&vfp_kmode_exception_hook[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) subsys_initcall(vfp_kmode_exception_hook_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) * Kernel-side NEON support functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) void kernel_neon_begin(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) struct thread_info *thread = current_thread_info();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) unsigned int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) u32 fpexc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) * Kernel mode NEON is only allowed outside of interrupt context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) * with preemption disabled. This will make sure that the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) * mode NEON register contents never need to be preserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) BUG_ON(in_interrupt());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) cpu = get_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) fpexc = fmrx(FPEXC) | FPEXC_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) fmxr(FPEXC, fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) * Save the userland NEON/VFP state. Under UP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) * the owner could be a task other than 'current'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) if (vfp_state_in_hw(cpu, thread))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) vfp_save_state(&thread->vfpstate, fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) #ifndef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) else if (vfp_current_hw_state[cpu] != NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) vfp_save_state(vfp_current_hw_state[cpu], fpexc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) vfp_current_hw_state[cpu] = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) EXPORT_SYMBOL(kernel_neon_begin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) void kernel_neon_end(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) /* Disable the NEON/VFP unit. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) put_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) EXPORT_SYMBOL(kernel_neon_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) #endif /* CONFIG_KERNEL_MODE_NEON */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static int __init vfp_detect(struct pt_regs *regs, unsigned int instr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) VFP_arch = UINT_MAX; /* mark as not present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) regs->ARM_pc += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static struct undef_hook vfp_detect_hook __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) .instr_mask = 0x0c000e00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) .instr_val = 0x0c000a00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) .cpsr_mask = MODE_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) .cpsr_val = SVC_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) .fn = vfp_detect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) * VFP support code initialisation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) static int __init vfp_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) unsigned int vfpsid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) unsigned int cpu_arch = cpu_architecture();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * Enable the access to the VFP on all online CPUs so the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) * following test on FPSID will succeed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) if (cpu_arch >= CPU_ARCH_ARMv6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) on_each_cpu(vfp_enable, NULL, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) * First check that there is a VFP that we can use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) * The handler is already setup to just log calls, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) * we just need to read the VFPSID register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) register_undef_hook(&vfp_detect_hook);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) vfpsid = fmrx(FPSID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) unregister_undef_hook(&vfp_detect_hook);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) vfp_vector = vfp_null_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) pr_info("VFP support v0.3: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) if (VFP_arch) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) pr_cont("not present\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) /* Extract the architecture on CPUID scheme */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) VFP_arch = vfpsid & FPSID_CPUID_ARCH_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) VFP_arch >>= FPSID_ARCH_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) * Check for the presence of the Advanced SIMD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) * load/store instructions, integer and single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) * precision floating point operations. Only check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) * for NEON if the hardware has the MVFR registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) if (IS_ENABLED(CONFIG_NEON) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) (fmrx(MVFR1) & 0x000fff00) == 0x00011100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) elf_hwcap |= HWCAP_NEON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) if (IS_ENABLED(CONFIG_VFPv3)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) u32 mvfr0 = fmrx(MVFR0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) if (((mvfr0 & MVFR0_DP_MASK) >> MVFR0_DP_BIT) == 0x2 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) ((mvfr0 & MVFR0_SP_MASK) >> MVFR0_SP_BIT) == 0x2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) elf_hwcap |= HWCAP_VFPv3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) * Check for VFPv3 D16 and VFPv4 D16. CPUs in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) * this configuration only have 16 x 64bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) * registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) if ((mvfr0 & MVFR0_A_SIMD_MASK) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) /* also v4-D16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) elf_hwcap |= HWCAP_VFPv3D16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) elf_hwcap |= HWCAP_VFPD32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) elf_hwcap |= HWCAP_VFPv4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) /* Extract the architecture version on pre-cpuid scheme */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) if (vfpsid & FPSID_NODOUBLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) pr_cont("no double precision support\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) cpuhp_setup_state_nocalls(CPUHP_AP_ARM_VFP_STARTING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) "arm/vfp:starting", vfp_starting_cpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) vfp_dying_cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) vfp_vector = vfp_support_entry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) thread_register_notifier(&vfp_notifier_block);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) vfp_pm_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) * We detected VFP, and the support code is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) * in place; report VFP support to userspace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) elf_hwcap |= HWCAP_VFP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) VFP_arch,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) core_initcall(vfp_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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