^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/arch/arm/vfp/vfpdouble.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * This code is derived in part from John R. Housers softfloat library, which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * carries the following notice:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * ===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * This C source file is part of the SoftFloat IEC/IEEE Floating-point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Arithmetic Package, Release 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Written by John R. Hauser. This work was made possible in part by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * International Computer Science Institute, located at Suite 600, 1947 Center
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Street, Berkeley, California 94704. Funding was partially provided by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * National Science Foundation under grant MIP-9311980. The original version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * of this code was written as part of a project to build a fixed-point vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * processor in collaboration with the University of California at Berkeley,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * overseen by Profs. Nelson Morgan and John Wawrzynek. More information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * is available through the web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * arithmetic/softfloat.html'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * Derivative works are acceptable, even for commercial purposes, so long as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * (1) they include prominent notice that the work is derivative, and (2) they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * include prominent notice akin to these three paragraphs for those parts of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * this code that are retained.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * ===========================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/div64.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/vfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "vfpinstr.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include "vfp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static struct vfp_double vfp_double_default_qnan = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .exponent = 2047,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .sign = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .significand = VFP_DOUBLE_SIGNIFICAND_QNAN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) static void vfp_double_dump(const char *str, struct vfp_double *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) pr_debug("VFP: %s: sign=%d exponent=%d significand=%016llx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) str, d->sign != 0, d->exponent, d->significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static void vfp_double_normalise_denormal(struct vfp_double *vd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) int bits = 31 - fls(vd->significand >> 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) if (bits == 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) bits = 63 - fls(vd->significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) vfp_double_dump("normalise_denormal: in", vd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) if (bits) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) vd->exponent -= bits - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) vd->significand <<= bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) vfp_double_dump("normalise_denormal: out", vd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char *func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u64 significand, incr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int exponent, shift, underflow;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u32 rmode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) vfp_double_dump("pack: in", vd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * Infinities and NaNs are a special case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) if (vd->exponent == 2047 && (vd->significand == 0 || exceptions))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * Special-case zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (vd->significand == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) vd->exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) exponent = vd->exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) significand = vd->significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) shift = 32 - fls(significand >> 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (shift == 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) shift = 64 - fls(significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (shift) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) exponent -= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) significand <<= shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) vd->exponent = exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) vd->significand = significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) vfp_double_dump("pack: normalised", vd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * Tiny number?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) underflow = exponent < 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (underflow) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) significand = vfp_shiftright64jamming(significand, -exponent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) vd->exponent = exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) vd->significand = significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) vfp_double_dump("pack: tiny number", vd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) if (!(significand & ((1ULL << (VFP_DOUBLE_LOW_BITS + 1)) - 1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) underflow = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * Select rounding increment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) rmode = fpscr & FPSCR_RMODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (rmode == FPSCR_ROUND_NEAREST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) incr = 1ULL << VFP_DOUBLE_LOW_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if ((significand & (1ULL << (VFP_DOUBLE_LOW_BITS + 1))) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) incr -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) } else if (rmode == FPSCR_ROUND_TOZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vd->sign != 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) incr = (1ULL << (VFP_DOUBLE_LOW_BITS + 1)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) pr_debug("VFP: rounding increment = 0x%08llx\n", incr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) * Is our rounding going to overflow?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) if ((significand + incr) < significand) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) exponent += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) significand = (significand >> 1) | (significand & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) incr >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) vd->exponent = exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) vd->significand = significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) vfp_double_dump("pack: overflow", vd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * If any of the low bits (which will be shifted out of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * number) are non-zero, the result is inexact.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (significand & ((1 << (VFP_DOUBLE_LOW_BITS + 1)) - 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * Do our rounding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) significand += incr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * Infinity?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (exponent >= 2046) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) exceptions |= FPSCR_OFC | FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (incr == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) vd->exponent = 2045;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) vd->significand = 0x7fffffffffffffffULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) vd->exponent = 2047; /* infinity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) vd->significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (significand >> (VFP_DOUBLE_LOW_BITS + 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (exponent || significand > 0x8000000000000000ULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) underflow = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (underflow)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) exceptions |= FPSCR_UFC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) vd->exponent = exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) vd->significand = significand >> 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) pack:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) vfp_double_dump("pack: final", vd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) s64 d = vfp_double_pack(vd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) pr_debug("VFP: %s: d(d%d)=%016llx exceptions=%08x\n", func,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) dd, d, exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) vfp_put_double(d, dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * Propagate the NaN, setting exceptions if it is signalling.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * 'n' is always a NaN. 'm' may be a number, NaN or infinity.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) vfp_propagate_nan(struct vfp_double *vdd, struct vfp_double *vdn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct vfp_double *vdm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct vfp_double *nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) int tn, tm = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) tn = vfp_double_type(vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (vdm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) tm = vfp_double_type(vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if (fpscr & FPSCR_DEFAULT_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * Default NaN mode - always returns a quiet NaN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) nan = &vfp_double_default_qnan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) * Contemporary mode - select the first signalling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * NAN, or if neither are signalling, the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * quiet NAN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if (tn == VFP_SNAN || (tm != VFP_SNAN && tn == VFP_QNAN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) nan = vdn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) nan = vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * Make the NaN quiet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) nan->significand |= VFP_DOUBLE_SIGNIFICAND_QNAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) *vdd = *nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * If one was a signalling NAN, raise invalid operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return tn == VFP_SNAN || tm == VFP_SNAN ? FPSCR_IOC : VFP_NAN_FLAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * Extended operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) vfp_put_double(vfp_double_packed_abs(vfp_get_double(dm)), dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) vfp_put_double(vfp_get_double(dm), dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) vfp_put_double(vfp_double_packed_negate(vfp_get_double(dm)), dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static u32 vfp_double_fsqrt(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) struct vfp_double vdm, vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int ret, tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) tm = vfp_double_type(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (tm & (VFP_NAN|VFP_INFINITY)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) struct vfp_double *vdp = &vdd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (tm & VFP_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ret = vfp_propagate_nan(vdp, &vdm, NULL, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) else if (vdm.sign == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) sqrt_copy:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) vdp = &vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) sqrt_invalid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) vdp = &vfp_double_default_qnan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) ret = FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) vfp_put_double(vfp_double_pack(vdp), dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * sqrt(+/- 0) == +/- 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (tm & VFP_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) goto sqrt_copy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * Normalise a denormalised number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) vfp_double_normalise_denormal(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * sqrt(<0) = invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) if (vdm.sign)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) goto sqrt_invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) vfp_double_dump("sqrt", &vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * Estimate the square root.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) vdd.sign = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) vdd.exponent = ((vdm.exponent - 1023) >> 1) + 1023;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) vdd.significand = (u64)vfp_estimate_sqrt_significand(vdm.exponent, vdm.significand >> 32) << 31;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) vfp_double_dump("sqrt estimate1", &vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) vdm.significand >>= 1 + (vdm.exponent & 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) vdd.significand += 2 + vfp_estimate_div128to64(vdm.significand, 0, vdd.significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) vfp_double_dump("sqrt estimate2", &vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) * And now adjust.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if ((vdd.significand & VFP_DOUBLE_LOW_BITS_MASK) <= 5) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) if (vdd.significand < 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) vdd.significand = ~0ULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) u64 termh, terml, remh, reml;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) vdm.significand <<= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) mul64to128(&termh, &terml, vdd.significand, vdd.significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) sub128(&remh, &reml, vdm.significand, 0, termh, terml);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) while ((s64)remh < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) vdd.significand -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) shift64left(&termh, &terml, vdd.significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) terml |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) add128(&remh, &reml, remh, reml, termh, terml);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) vdd.significand |= (remh | reml) != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) vdd.significand = vfp_shiftright64jamming(vdd.significand, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) return vfp_double_normaliseround(dd, &vdd, fpscr, 0, "fsqrt");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * Equal := ZC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) * Less than := N
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) * Greater than := C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) * Unordered := CV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) static u32 vfp_compare(int dd, int signal_on_qnan, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) s64 d, m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) u32 ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) m = vfp_get_double(dm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (vfp_double_packed_exponent(m) == 2047 && vfp_double_packed_mantissa(m)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ret |= FPSCR_C | FPSCR_V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (signal_on_qnan || !(vfp_double_packed_mantissa(m) & (1ULL << (VFP_DOUBLE_MANTISSA_BITS - 1))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * Signalling NaN, or signalling on quiet NaN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ret |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) d = vfp_get_double(dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (vfp_double_packed_exponent(d) == 2047 && vfp_double_packed_mantissa(d)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ret |= FPSCR_C | FPSCR_V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (signal_on_qnan || !(vfp_double_packed_mantissa(d) & (1ULL << (VFP_DOUBLE_MANTISSA_BITS - 1))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) * Signalling NaN, or signalling on quiet NaN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) ret |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (ret == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (d == m || vfp_double_packed_abs(d | m) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) * equal
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) ret |= FPSCR_Z | FPSCR_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) } else if (vfp_double_packed_sign(d ^ m)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * different signs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (vfp_double_packed_sign(d))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * d is negative, so d < m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) ret |= FPSCR_N;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * d is positive, so d > m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) ret |= FPSCR_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) } else if ((vfp_double_packed_sign(d) != 0) ^ (d < m)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * d < m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) ret |= FPSCR_N;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) } else if ((vfp_double_packed_sign(d) != 0) ^ (d > m)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * d > m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) ret |= FPSCR_C;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) static u32 vfp_double_fcmp(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return vfp_compare(dd, 0, dm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) static u32 vfp_double_fcmpe(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) return vfp_compare(dd, 1, dm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) static u32 vfp_double_fcmpz(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return vfp_compare(dd, 0, VFP_REG_ZERO, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) static u32 vfp_double_fcmpez(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return vfp_compare(dd, 1, VFP_REG_ZERO, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) static u32 vfp_double_fcvts(int sd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) struct vfp_double vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) struct vfp_single vsd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) int tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) u32 exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) tm = vfp_double_type(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * If we have a signalling NaN, signal invalid operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (tm == VFP_SNAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) exceptions = FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) vfp_double_normalise_denormal(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) vsd.sign = vdm.sign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) vsd.significand = vfp_hi64to32jamming(vdm.significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) * If we have an infinity or a NaN, the exponent must be 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) if (tm & (VFP_INFINITY|VFP_NAN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) vsd.exponent = 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (tm == VFP_QNAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) vsd.significand |= VFP_SINGLE_SIGNIFICAND_QNAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) goto pack_nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) } else if (tm & VFP_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) vsd.exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) vsd.exponent = vdm.exponent - (1023 - 127);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) return vfp_single_normaliseround(sd, &vsd, fpscr, exceptions, "fcvts");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) pack_nan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) vfp_put_float(vfp_single_pack(&vsd), sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static u32 vfp_double_fuito(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) struct vfp_double vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) u32 m = vfp_get_float(dm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) vdm.sign = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) vdm.exponent = 1023 + 63 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) vdm.significand = (u64)m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) return vfp_double_normaliseround(dd, &vdm, fpscr, 0, "fuito");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) static u32 vfp_double_fsito(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) struct vfp_double vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) u32 m = vfp_get_float(dm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) vdm.sign = (m & 0x80000000) >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) vdm.exponent = 1023 + 63 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) vdm.significand = vdm.sign ? -m : m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) return vfp_double_normaliseround(dd, &vdm, fpscr, 0, "fsito");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) static u32 vfp_double_ftoui(int sd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) struct vfp_double vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) u32 d, exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) int rmode = fpscr & FPSCR_RMODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) int tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) * Do we have a denormalised number?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) tm = vfp_double_type(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) exceptions |= FPSCR_IDC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (tm & VFP_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) vdm.sign = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (vdm.exponent >= 1023 + 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) d = vdm.sign ? 0 : 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) exceptions = FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) } else if (vdm.exponent >= 1023 - 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) int shift = 1023 + 63 - vdm.exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) u64 rem, incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * 2^0 <= m < 2^32-2^8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) d = (vdm.significand << 1) >> shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) rem = vdm.significand << (65 - shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (rmode == FPSCR_ROUND_NEAREST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) incr = 0x8000000000000000ULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if ((d & 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) incr -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) } else if (rmode == FPSCR_ROUND_TOZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vdm.sign != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) incr = ~0ULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if ((rem + incr) < rem) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if (d < 0xffffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) d += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) if (d && vdm.sign) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) } else if (rem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (vdm.exponent | vdm.significand) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) d = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) else if (rmode == FPSCR_ROUND_MINUSINF && vdm.sign) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) pr_debug("VFP: ftoui: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) vfp_put_float(d, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static u32 vfp_double_ftouiz(int sd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) return vfp_double_ftoui(sd, unused, dm, FPSCR_ROUND_TOZERO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) static u32 vfp_double_ftosi(int sd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) struct vfp_double vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) u32 d, exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) int rmode = fpscr & FPSCR_RMODE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) int tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) vfp_double_dump("VDM", &vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) * Do we have denormalised number?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) tm = vfp_double_type(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) exceptions |= FPSCR_IDC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if (tm & VFP_NAN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) } else if (vdm.exponent >= 1023 + 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) d = 0x7fffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) if (vdm.sign)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) d = ~d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) } else if (vdm.exponent >= 1023 - 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) int shift = 1023 + 63 - vdm.exponent; /* 58 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) u64 rem, incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) d = (vdm.significand << 1) >> shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) rem = vdm.significand << (65 - shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if (rmode == FPSCR_ROUND_NEAREST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) incr = 0x8000000000000000ULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) if ((d & 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) incr -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) } else if (rmode == FPSCR_ROUND_TOZERO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) incr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) } else if ((rmode == FPSCR_ROUND_PLUSINF) ^ (vdm.sign != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) incr = ~0ULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if ((rem + incr) < rem && d < 0xffffffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) d += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (d > 0x7fffffff + (vdm.sign != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) d = 0x7fffffff + (vdm.sign != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) exceptions |= FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) } else if (rem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (vdm.sign)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) d = -d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) d = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (vdm.exponent | vdm.significand) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) exceptions |= FPSCR_IXC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (rmode == FPSCR_ROUND_PLUSINF && vdm.sign == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) d = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) else if (rmode == FPSCR_ROUND_MINUSINF && vdm.sign)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) d = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) pr_debug("VFP: ftosi: d(s%d)=%08x exceptions=%08x\n", sd, d, exceptions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) vfp_put_float((s32)d, sd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) static u32 vfp_double_ftosiz(int dd, int unused, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return vfp_double_ftosi(dd, unused, dm, FPSCR_ROUND_TOZERO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static struct op fops_ext[32] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) [FEXT_TO_IDX(FEXT_FCPY)] = { vfp_double_fcpy, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) [FEXT_TO_IDX(FEXT_FABS)] = { vfp_double_fabs, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) [FEXT_TO_IDX(FEXT_FNEG)] = { vfp_double_fneg, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) [FEXT_TO_IDX(FEXT_FSQRT)] = { vfp_double_fsqrt, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) [FEXT_TO_IDX(FEXT_FCMP)] = { vfp_double_fcmp, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) [FEXT_TO_IDX(FEXT_FCMPE)] = { vfp_double_fcmpe, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) [FEXT_TO_IDX(FEXT_FCMPZ)] = { vfp_double_fcmpz, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) [FEXT_TO_IDX(FEXT_FCMPEZ)] = { vfp_double_fcmpez, OP_SCALAR },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) [FEXT_TO_IDX(FEXT_FCVT)] = { vfp_double_fcvts, OP_SCALAR|OP_SD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) [FEXT_TO_IDX(FEXT_FUITO)] = { vfp_double_fuito, OP_SCALAR|OP_SM },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) [FEXT_TO_IDX(FEXT_FSITO)] = { vfp_double_fsito, OP_SCALAR|OP_SM },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) [FEXT_TO_IDX(FEXT_FTOUI)] = { vfp_double_ftoui, OP_SCALAR|OP_SD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) [FEXT_TO_IDX(FEXT_FTOUIZ)] = { vfp_double_ftouiz, OP_SCALAR|OP_SD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) [FEXT_TO_IDX(FEXT_FTOSI)] = { vfp_double_ftosi, OP_SCALAR|OP_SD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) [FEXT_TO_IDX(FEXT_FTOSIZ)] = { vfp_double_ftosiz, OP_SCALAR|OP_SD },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) vfp_double_fadd_nonnumber(struct vfp_double *vdd, struct vfp_double *vdn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) struct vfp_double *vdm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct vfp_double *vdp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) u32 exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) int tn, tm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) tn = vfp_double_type(vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) tm = vfp_double_type(vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (tn & tm & VFP_INFINITY) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) * Two infinities. Are they different signs?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (vdn->sign ^ vdm->sign) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) * different signs -> invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) exceptions = FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) vdp = &vfp_double_default_qnan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) * same signs -> valid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) vdp = vdn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) } else if (tn & VFP_INFINITY && tm & VFP_NUMBER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) * One infinity and one number -> infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) vdp = vdn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) * 'n' is a NaN of some type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) return vfp_propagate_nan(vdd, vdn, vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) *vdd = *vdp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) vfp_double_add(struct vfp_double *vdd, struct vfp_double *vdn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) struct vfp_double *vdm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) u32 exp_diff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) u64 m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) if (vdn->significand & (1ULL << 63) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) vdm->significand & (1ULL << 63)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) pr_info("VFP: bad FP values in %s\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) vfp_double_dump("VDN", vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) vfp_double_dump("VDM", vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) * Ensure that 'n' is the largest magnitude number. Note that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) * if 'n' and 'm' have equal exponents, we do not swap them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) * This ensures that NaN propagation works correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if (vdn->exponent < vdm->exponent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) struct vfp_double *t = vdn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) vdn = vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) vdm = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * Is 'n' an infinity or a NaN? Note that 'm' may be a number,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * infinity or a NaN here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) if (vdn->exponent == 2047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) return vfp_double_fadd_nonnumber(vdd, vdn, vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) * We have two proper numbers, where 'vdn' is the larger magnitude.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) * Copy 'n' to 'd' before doing the arithmetic.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) *vdd = *vdn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) * Align 'm' with the result.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) exp_diff = vdn->exponent - vdm->exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) m_sig = vfp_shiftright64jamming(vdm->significand, exp_diff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) * If the signs are different, we are really subtracting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) if (vdn->sign ^ vdm->sign) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) m_sig = vdn->significand - m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) if ((s64)m_sig < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) vdd->sign = vfp_sign_negate(vdd->sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) m_sig = -m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) } else if (m_sig == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) vdd->sign = (fpscr & FPSCR_RMODE_MASK) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) FPSCR_ROUND_MINUSINF ? 0x8000 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) m_sig += vdn->significand;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) vdd->significand = m_sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) vfp_double_multiply(struct vfp_double *vdd, struct vfp_double *vdn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) struct vfp_double *vdm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) vfp_double_dump("VDN", vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) vfp_double_dump("VDM", vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) * Ensure that 'n' is the largest magnitude number. Note that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) * if 'n' and 'm' have equal exponents, we do not swap them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) * This ensures that NaN propagation works correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) if (vdn->exponent < vdm->exponent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) struct vfp_double *t = vdn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) vdn = vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) vdm = t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) pr_debug("VFP: swapping M <-> N\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) vdd->sign = vdn->sign ^ vdm->sign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) * If 'n' is an infinity or NaN, handle it. 'm' may be anything.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) if (vdn->exponent == 2047) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) if (vdn->significand || (vdm->exponent == 2047 && vdm->significand))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) return vfp_propagate_nan(vdd, vdn, vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) if ((vdm->exponent | vdm->significand) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) *vdd = vfp_double_default_qnan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) return FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) vdd->exponent = vdn->exponent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) vdd->significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) * If 'm' is zero, the result is always zero. In this case,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) * 'n' may be zero or a number, but it doesn't matter which.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) if ((vdm->exponent | vdm->significand) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) vdd->exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) vdd->significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) * We add 2 to the destination exponent for the same reason
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) * as the addition case - though this time we have +1 from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) * each input operand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) vdd->exponent = vdn->exponent + vdm->exponent - 1023 + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) vdd->significand = vfp_hi64multiply64(vdn->significand, vdm->significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) vfp_double_dump("VDD", vdd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) #define NEG_MULTIPLY (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) #define NEG_SUBTRACT (1 << 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static u32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) vfp_double_multiply_accumulate(int dd, int dn, int dm, u32 fpscr, u32 negate, char *func)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) struct vfp_double vdd, vdp, vdn, vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) vfp_double_unpack(&vdn, vfp_get_double(dn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) if (vdn.exponent == 0 && vdn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) vfp_double_normalise_denormal(&vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) if (vdm.exponent == 0 && vdm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) vfp_double_normalise_denormal(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) exceptions = vfp_double_multiply(&vdp, &vdn, &vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) if (negate & NEG_MULTIPLY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) vdp.sign = vfp_sign_negate(vdp.sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) vfp_double_unpack(&vdn, vfp_get_double(dd));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) if (vdn.exponent == 0 && vdn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) vfp_double_normalise_denormal(&vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) if (negate & NEG_SUBTRACT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) vdn.sign = vfp_sign_negate(vdn.sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) exceptions |= vfp_double_add(&vdd, &vdn, &vdp, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, func);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) * Standard operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) * sd = sd + (sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static u32 vfp_double_fmac(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, 0, "fmac");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) * sd = sd - (sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) static u32 vfp_double_fnmac(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, NEG_MULTIPLY, "fnmac");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) * sd = -sd + (sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) static u32 vfp_double_fmsc(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, NEG_SUBTRACT, "fmsc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) * sd = -sd - (sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) static u32 vfp_double_fnmsc(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) return vfp_double_multiply_accumulate(dd, dn, dm, fpscr, NEG_SUBTRACT | NEG_MULTIPLY, "fnmsc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) * sd = sn * sm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) static u32 vfp_double_fmul(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) struct vfp_double vdd, vdn, vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) vfp_double_unpack(&vdn, vfp_get_double(dn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) if (vdn.exponent == 0 && vdn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) vfp_double_normalise_denormal(&vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) if (vdm.exponent == 0 && vdm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) vfp_double_normalise_denormal(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) exceptions = vfp_double_multiply(&vdd, &vdn, &vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fmul");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) * sd = -(sn * sm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) static u32 vfp_double_fnmul(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) struct vfp_double vdd, vdn, vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) vfp_double_unpack(&vdn, vfp_get_double(dn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) if (vdn.exponent == 0 && vdn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) vfp_double_normalise_denormal(&vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) if (vdm.exponent == 0 && vdm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) vfp_double_normalise_denormal(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) exceptions = vfp_double_multiply(&vdd, &vdn, &vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) vdd.sign = vfp_sign_negate(vdd.sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fnmul");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) * sd = sn + sm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) static u32 vfp_double_fadd(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) struct vfp_double vdd, vdn, vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) vfp_double_unpack(&vdn, vfp_get_double(dn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) if (vdn.exponent == 0 && vdn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) vfp_double_normalise_denormal(&vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) if (vdm.exponent == 0 && vdm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) vfp_double_normalise_denormal(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) exceptions = vfp_double_add(&vdd, &vdn, &vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fadd");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) * sd = sn - sm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) static u32 vfp_double_fsub(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) struct vfp_double vdd, vdn, vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) u32 exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) vfp_double_unpack(&vdn, vfp_get_double(dn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) if (vdn.exponent == 0 && vdn.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) vfp_double_normalise_denormal(&vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) if (vdm.exponent == 0 && vdm.significand)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) vfp_double_normalise_denormal(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) * Subtraction is like addition, but with a negated operand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) vdm.sign = vfp_sign_negate(vdm.sign);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) exceptions = vfp_double_add(&vdd, &vdn, &vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) return vfp_double_normaliseround(dd, &vdd, fpscr, exceptions, "fsub");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) * sd = sn / sm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) static u32 vfp_double_fdiv(int dd, int dn, int dm, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) struct vfp_double vdd, vdn, vdm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) u32 exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) int tm, tn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) vfp_double_unpack(&vdn, vfp_get_double(dn));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) vfp_double_unpack(&vdm, vfp_get_double(dm));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) vdd.sign = vdn.sign ^ vdm.sign;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) tn = vfp_double_type(&vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) tm = vfp_double_type(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) * Is n a NAN?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) if (tn & VFP_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) goto vdn_nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) * Is m a NAN?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) if (tm & VFP_NAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) goto vdm_nan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) * If n and m are infinity, the result is invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) * If n and m are zero, the result is invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) if (tm & tn & (VFP_INFINITY|VFP_ZERO))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) goto invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * If n is infinity, the result is infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) if (tn & VFP_INFINITY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) goto infinity;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) * If m is zero, raise div0 exceptions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) if (tm & VFP_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) goto divzero;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) * If m is infinity, or n is zero, the result is zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) if (tm & VFP_INFINITY || tn & VFP_ZERO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) goto zero;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) if (tn & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) vfp_double_normalise_denormal(&vdn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) if (tm & VFP_DENORMAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) vfp_double_normalise_denormal(&vdm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) * Ok, we have two numbers, we can perform division.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) vdd.exponent = vdn.exponent - vdm.exponent + 1023 - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) vdm.significand <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) if (vdm.significand <= (2 * vdn.significand)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) vdn.significand >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) vdd.exponent++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) vdd.significand = vfp_estimate_div128to64(vdn.significand, 0, vdm.significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) if ((vdd.significand & 0x1ff) <= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) u64 termh, terml, remh, reml;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) mul64to128(&termh, &terml, vdm.significand, vdd.significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) sub128(&remh, &reml, vdn.significand, 0, termh, terml);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) while ((s64)remh < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) vdd.significand -= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) add128(&remh, &reml, remh, reml, 0, vdm.significand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) vdd.significand |= (reml != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) return vfp_double_normaliseround(dd, &vdd, fpscr, 0, "fdiv");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) vdn_nan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) exceptions = vfp_propagate_nan(&vdd, &vdn, &vdm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) pack:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) vfp_put_double(vfp_double_pack(&vdd), dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) vdm_nan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) exceptions = vfp_propagate_nan(&vdd, &vdm, &vdn, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) zero:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) vdd.exponent = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) vdd.significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) divzero:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) exceptions = FPSCR_DZC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) infinity:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) vdd.exponent = 2047;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) vdd.significand = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) goto pack;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) invalid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) vfp_put_double(vfp_double_pack(&vfp_double_default_qnan), dd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) return FPSCR_IOC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) static struct op fops[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) [FOP_TO_IDX(FOP_FMAC)] = { vfp_double_fmac, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) [FOP_TO_IDX(FOP_FNMAC)] = { vfp_double_fnmac, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) [FOP_TO_IDX(FOP_FMSC)] = { vfp_double_fmsc, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) [FOP_TO_IDX(FOP_FNMSC)] = { vfp_double_fnmsc, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) [FOP_TO_IDX(FOP_FMUL)] = { vfp_double_fmul, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) [FOP_TO_IDX(FOP_FNMUL)] = { vfp_double_fnmul, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) [FOP_TO_IDX(FOP_FADD)] = { vfp_double_fadd, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) [FOP_TO_IDX(FOP_FSUB)] = { vfp_double_fsub, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) [FOP_TO_IDX(FOP_FDIV)] = { vfp_double_fdiv, 0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) #define FREG_BANK(x) ((x) & 0x0c)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) #define FREG_IDX(x) ((x) & 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) u32 vfp_double_cpdo(u32 inst, u32 fpscr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) u32 op = inst & FOP_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) u32 exceptions = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) unsigned int dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) unsigned int dn = vfp_get_dn(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) unsigned int dm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) unsigned int vecitr, veclen, vecstride;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) struct op *fop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) vecstride = (1 + ((fpscr & FPSCR_STRIDE_MASK) == FPSCR_STRIDE_MASK));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) fop = (op == FOP_EXT) ? &fops_ext[FEXT_TO_IDX(inst)] : &fops[FOP_TO_IDX(op)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) * fcvtds takes an sN register number as destination, not dN.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) * It also always operates on scalars.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) if (fop->flags & OP_SD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) dest = vfp_get_sd(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) dest = vfp_get_dd(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) * f[us]ito takes a sN operand, not a dN operand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) if (fop->flags & OP_SM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) dm = vfp_get_sm(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) dm = vfp_get_dm(inst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) * If destination bank is zero, vector length is always '1'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) * ARM DDI0100F C5.1.3, C5.3.2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) if ((fop->flags & OP_SCALAR) || (FREG_BANK(dest) == 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) veclen = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) veclen = fpscr & FPSCR_LENGTH_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) (veclen >> FPSCR_LENGTH_BIT) + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) if (!fop->fn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) goto invalid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) for (vecitr = 0; vecitr <= veclen; vecitr += 1 << FPSCR_LENGTH_BIT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) u32 except;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) char type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) type = fop->flags & OP_SD ? 's' : 'd';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) if (op == FOP_EXT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) pr_debug("VFP: itr%d (%c%u) = op[%u] (d%u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) vecitr >> FPSCR_LENGTH_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) type, dest, dn, dm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) pr_debug("VFP: itr%d (%c%u) = (d%u) op[%u] (d%u)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) vecitr >> FPSCR_LENGTH_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) type, dest, dn, FOP_TO_IDX(op), dm);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) except = fop->fn(dest, dn, dm, fpscr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) pr_debug("VFP: itr%d: exceptions=%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) vecitr >> FPSCR_LENGTH_BIT, except);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) exceptions |= except;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) * CHECK: It appears to be undefined whether we stop when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) * we encounter an exception. We continue.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) dest = FREG_BANK(dest) + ((FREG_IDX(dest) + vecstride) & 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) dn = FREG_BANK(dn) + ((FREG_IDX(dn) + vecstride) & 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) if (FREG_BANK(dm) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) dm = FREG_BANK(dm) + ((FREG_IDX(dm) + vecstride) & 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) return exceptions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) invalid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) return ~0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) }