^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2012 Rabin Vincent <rabin at rab.in>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/uprobes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include "../decode.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "../decode-arm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static int uprobes_substitute_pc(unsigned long *pinsn, u32 oregs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) probes_opcode_t insn = __mem_to_opcode_arm(*pinsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) probes_opcode_t temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) probes_opcode_t mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int freereg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) u32 free = 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) u32 regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) for (regs = oregs; regs; regs >>= 4, insn >>= 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) if ((regs & 0xf) == REG_TYPE_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) free &= ~(1 << (insn & 0xf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* No PC, no problem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) if (free & (1 << 15))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) if (!free)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * fls instead of ffs ensures that for "ldrd r0, r1, [pc]" we would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * pick LR instead of R1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) freereg = free = fls(free) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) temp = __mem_to_opcode_arm(*pinsn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) insn = temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) regs = oregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) mask = 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) for (; regs; regs >>= 4, mask <<= 4, free <<= 4, temp >>= 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) if ((regs & 0xf) == REG_TYPE_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) if ((temp & 0xf) != 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) insn &= ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) insn |= free & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *pinsn = __opcode_to_mem_arm(insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return freereg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static void uprobe_set_pc(struct arch_uprobe *auprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) struct arch_uprobe_task *autask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 pcreg = auprobe->pcreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) autask->backup = regs->uregs[pcreg];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) regs->uregs[pcreg] = regs->ARM_pc + 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void uprobe_unset_pc(struct arch_uprobe *auprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct arch_uprobe_task *autask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* PC will be taken care of by common code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) regs->uregs[auprobe->pcreg] = autask->backup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static void uprobe_aluwrite_pc(struct arch_uprobe *auprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct arch_uprobe_task *autask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) u32 pcreg = auprobe->pcreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) alu_write_pc(regs->uregs[pcreg], regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) regs->uregs[pcreg] = autask->backup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static void uprobe_write_pc(struct arch_uprobe *auprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct arch_uprobe_task *autask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u32 pcreg = auprobe->pcreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) load_write_pc(regs->uregs[pcreg], regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) regs->uregs[pcreg] = autask->backup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) enum probes_insn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) decode_pc_ro(probes_opcode_t insn, struct arch_probes_insn *asi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) const struct decode_header *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) asi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct decode_emulate *decode = (struct decode_emulate *) d;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u32 regs = decode->header.type_regs.bits >> DECODE_TYPE_BITS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) reg = uprobes_substitute_pc(&auprobe->ixol[0], regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (reg == 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return INSN_GOOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (reg == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return INSN_REJECTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) auprobe->pcreg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) auprobe->prehandler = uprobe_set_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) auprobe->posthandler = uprobe_unset_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return INSN_GOOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) enum probes_insn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) decode_wb_pc(probes_opcode_t insn, struct arch_probes_insn *asi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) const struct decode_header *d, bool alu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) asi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) enum probes_insn ret = decode_pc_ro(insn, asi, d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) if (((insn >> 12) & 0xf) == 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) auprobe->posthandler = alu ? uprobe_aluwrite_pc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) : uprobe_write_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) enum probes_insn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) decode_rd12rn16rm0rs8_rwflags(probes_opcode_t insn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) struct arch_probes_insn *asi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) const struct decode_header *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return decode_wb_pc(insn, asi, d, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) enum probes_insn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) decode_ldr(probes_opcode_t insn, struct arch_probes_insn *asi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) const struct decode_header *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return decode_wb_pc(insn, asi, d, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) enum probes_insn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) uprobe_decode_ldmstm(probes_opcode_t insn,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct arch_probes_insn *asi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) const struct decode_header *d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) struct arch_uprobe *auprobe = container_of(asi, struct arch_uprobe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) asi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) unsigned reglist = insn & 0xffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) int rn = (insn >> 16) & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int lbit = insn & (1 << 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) unsigned used = reglist | (1 << rn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) if (rn == 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) return INSN_REJECTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (!(used & (1 << 15)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return INSN_GOOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (used & (1 << 14))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) return INSN_REJECTED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* Use LR instead of PC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) insn ^= 0xc000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) auprobe->pcreg = 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) auprobe->ixol[0] = __opcode_to_mem_arm(insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) auprobe->prehandler = uprobe_set_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) if (lbit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) auprobe->posthandler = uprobe_write_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) auprobe->posthandler = uprobe_unset_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return INSN_GOOD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) const union decode_action uprobes_probes_actions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) [PROBES_PRELOAD_IMM] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) [PROBES_PRELOAD_REG] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) [PROBES_BRANCH_IMM] = {.handler = simulate_blx1},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) [PROBES_MRS] = {.handler = simulate_mrs},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) [PROBES_BRANCH_REG] = {.handler = simulate_blx2bx},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) [PROBES_CLZ] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) [PROBES_SATURATING_ARITHMETIC] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) [PROBES_MUL1] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) [PROBES_MUL2] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) [PROBES_SWP] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) [PROBES_LDRSTRD] = {.decoder = decode_pc_ro},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) [PROBES_LOAD_EXTRA] = {.decoder = decode_pc_ro},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) [PROBES_LOAD] = {.decoder = decode_ldr},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) [PROBES_STORE_EXTRA] = {.decoder = decode_pc_ro},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) [PROBES_STORE] = {.decoder = decode_pc_ro},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) [PROBES_MOV_IP_SP] = {.handler = simulate_mov_ipsp},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) [PROBES_DATA_PROCESSING_REG] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .decoder = decode_rd12rn16rm0rs8_rwflags},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) [PROBES_DATA_PROCESSING_IMM] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .decoder = decode_rd12rn16rm0rs8_rwflags},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) [PROBES_MOV_HALFWORD] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) [PROBES_SEV] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) [PROBES_WFE] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) [PROBES_SATURATE] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) [PROBES_REV] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) [PROBES_MMI] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) [PROBES_PACK] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) [PROBES_EXTEND] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) [PROBES_EXTEND_ADD] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) [PROBES_MUL_ADD_LONG] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) [PROBES_MUL_ADD] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) [PROBES_BITFIELD] = {.handler = probes_simulate_nop},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) [PROBES_BRANCH] = {.handler = simulate_bbl},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) [PROBES_LDMSTM] = {.decoder = uprobe_decode_ldmstm}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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