^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Kernel Probes Jump Optimization (Optprobes)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) IBM Corporation, 2002, 2004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) Hitachi Ltd., 2012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) Huawei Inc., 2014
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kprobes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/jump_label.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/kprobes.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* for arm_gen_branch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/insn.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /* for patch_text */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/patch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * See register_usage_flags. If the probed instruction doesn't use PC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * we can copy it into template and have it executed directly without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * simulation or emulation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ARM_REG_PC 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define can_kprobe_direct_exec(m) (!test_bit(ARM_REG_PC, &(m)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * NOTE: the first sub and add instruction will be modified according
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * to the stack cost of the instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) asm (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) ".global optprobe_template_entry\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "optprobe_template_entry:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) ".global optprobe_template_sub_sp\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) "optprobe_template_sub_sp:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) " sub sp, sp, #0xff\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) " stmia sp, {r0 - r14} \n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ".global optprobe_template_add_sp\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) "optprobe_template_add_sp:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) " add r3, sp, #0xff\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) " str r3, [sp, #52]\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) " mrs r4, cpsr\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) " str r4, [sp, #64]\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) " mov r1, sp\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) " ldr r0, 1f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) " ldr r2, 2f\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * AEABI requires an 8-bytes alignment stack. If
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * SP % 8 != 0 (SP % 4 == 0 should be ensured),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * alloc more bytes here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) " and r4, sp, #4\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) " sub sp, sp, r4\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #if __LINUX_ARM_ARCH__ >= 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) " blx r2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) " mov lr, pc\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) " mov pc, r2\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) " add sp, sp, r4\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) " ldr r1, [sp, #64]\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) " tst r1, #"__stringify(PSR_T_BIT)"\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) " ldrne r2, [sp, #60]\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) " orrne r2, #1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) " strne r2, [sp, #60] @ set bit0 of PC for thumb\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) " msr cpsr_cxsf, r1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ".global optprobe_template_restore_begin\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "optprobe_template_restore_begin:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) " ldmia sp, {r0 - r15}\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) ".global optprobe_template_restore_orig_insn\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) "optprobe_template_restore_orig_insn:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) " nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) ".global optprobe_template_restore_end\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) "optprobe_template_restore_end:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) " nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) ".global optprobe_template_val\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) "optprobe_template_val:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) "1: .long 0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ".global optprobe_template_call\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) "optprobe_template_call:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) "2: .long 0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ".global optprobe_template_end\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) "optprobe_template_end:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define TMPL_VAL_IDX \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) ((unsigned long *)optprobe_template_val - (unsigned long *)optprobe_template_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define TMPL_CALL_IDX \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) ((unsigned long *)optprobe_template_call - (unsigned long *)optprobe_template_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define TMPL_END_IDX \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ((unsigned long *)optprobe_template_end - (unsigned long *)optprobe_template_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define TMPL_ADD_SP \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ((unsigned long *)optprobe_template_add_sp - (unsigned long *)optprobe_template_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define TMPL_SUB_SP \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ((unsigned long *)optprobe_template_sub_sp - (unsigned long *)optprobe_template_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define TMPL_RESTORE_BEGIN \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ((unsigned long *)optprobe_template_restore_begin - (unsigned long *)optprobe_template_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define TMPL_RESTORE_ORIGN_INSN \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ((unsigned long *)optprobe_template_restore_orig_insn - (unsigned long *)optprobe_template_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define TMPL_RESTORE_END \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ((unsigned long *)optprobe_template_restore_end - (unsigned long *)optprobe_template_entry)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * ARM can always optimize an instruction when using ARM ISA, except
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * instructions like 'str r0, [sp, r1]' which store to stack and unable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * to determine stack space consumption statically.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) int arch_prepared_optinsn(struct arch_optimized_insn *optinsn)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) return optinsn->insn != NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * In ARM ISA, kprobe opt always replace one instruction (4 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * aligned and 4 bytes long). It is impossible to encounter another
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * kprobe in the address range. So always return 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int arch_check_optimized_kprobe(struct optimized_kprobe *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /* Caller must ensure addr & 3 == 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static int can_optimize(struct kprobe *kp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (kp->ainsn.stack_space < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * 255 is the biggest imm can be used in 'sub r0, r0, #<imm>'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * Number larger than 255 needs special encoding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (kp->ainsn.stack_space > 255 - sizeof(struct pt_regs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Free optimized instruction slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) __arch_remove_optimized_kprobe(struct optimized_kprobe *op, int dirty)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (op->optinsn.insn) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) free_optinsn_slot(op->optinsn.insn, dirty);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) op->optinsn.insn = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) extern void kprobe_handler(struct pt_regs *regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) optimized_callback(struct optimized_kprobe *op, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct kprobe *p = &op->kp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct kprobe_ctlblk *kcb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* Save skipped registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) regs->ARM_pc = (unsigned long)op->kp.addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) regs->ARM_ORIG_r0 = ~0UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) kcb = get_kprobe_ctlblk();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (kprobe_running()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) kprobes_inc_nmissed_count(&op->kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) __this_cpu_write(current_kprobe, &op->kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) kcb->kprobe_status = KPROBE_HIT_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) opt_pre_handler(&op->kp, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) __this_cpu_write(current_kprobe, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * We singlestep the replaced instruction only when it can't be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * executed directly during restore.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) if (!p->ainsn.kprobe_direct_exec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) op->kp.ainsn.insn_singlestep(p->opcode, &p->ainsn, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) NOKPROBE_SYMBOL(optimized_callback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) int arch_prepare_optimized_kprobe(struct optimized_kprobe *op, struct kprobe *orig)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) kprobe_opcode_t *code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) unsigned long rel_chk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) unsigned long val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) unsigned long stack_protect = sizeof(struct pt_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (!can_optimize(orig))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return -EILSEQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) code = get_optinsn_slot();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (!code)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * Verify if the address gap is in 32MiB range, because this uses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * a relative jump.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * kprobe opt use a 'b' instruction to branch to optinsn.insn.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) * According to ARM manual, branch instruction is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * 31 28 27 24 23 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * +------+---+---+---+---+----------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * | cond | 1 | 0 | 1 | 0 | imm24 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * +------+---+---+---+---+----------------+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * imm24 is a signed 24 bits integer. The real branch offset is computed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * by: imm32 = SignExtend(imm24:'00', 32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * So the maximum forward branch should be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * The maximum backword branch should be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) * (0xff800000 << 2) = 0xfe000000 = -0x2000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * We can simply check (rel & 0xfe000003):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * if rel is positive, (rel & 0xfe000000) shoule be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * if rel is negitive, (rel & 0xfe000000) should be 0xfe000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * the last '3' is used for alignment checking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) rel_chk = (unsigned long)((long)code -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) (long)orig->addr + 8) & 0xfe000003;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if ((rel_chk != 0) && (rel_chk != 0xfe000000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * Different from x86, we free code buf directly instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * calling __arch_remove_optimized_kprobe() because
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * we have not fill any field in op.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) free_optinsn_slot(code, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Copy arch-dep-instance from template. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) memcpy(code, (unsigned long *)optprobe_template_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) TMPL_END_IDX * sizeof(kprobe_opcode_t));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* Adjust buffer according to instruction. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) BUG_ON(orig->ainsn.stack_space < 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) stack_protect += orig->ainsn.stack_space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* Should have been filtered by can_optimize(). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) BUG_ON(stack_protect > 255);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /* Create a 'sub sp, sp, #<stack_protect>' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) code[TMPL_SUB_SP] = __opcode_to_mem_arm(0xe24dd000 | stack_protect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /* Create a 'add r3, sp, #<stack_protect>' */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) code[TMPL_ADD_SP] = __opcode_to_mem_arm(0xe28d3000 | stack_protect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) /* Set probe information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) val = (unsigned long)op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) code[TMPL_VAL_IDX] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /* Set probe function call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) val = (unsigned long)optimized_callback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) code[TMPL_CALL_IDX] = val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* If possible, copy insn and have it executed during restore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) orig->ainsn.kprobe_direct_exec = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (can_kprobe_direct_exec(orig->ainsn.register_usage_flags)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) kprobe_opcode_t final_branch = arm_gen_branch(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) (unsigned long)(&code[TMPL_RESTORE_END]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) (unsigned long)(op->kp.addr) + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (final_branch != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * Replace original 'ldmia sp, {r0 - r15}' with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * 'ldmia {r0 - r14}', restore all registers except pc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) code[TMPL_RESTORE_BEGIN] = __opcode_to_mem_arm(0xe89d7fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* The original probed instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) code[TMPL_RESTORE_ORIGN_INSN] = __opcode_to_mem_arm(orig->opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* Jump back to next instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) code[TMPL_RESTORE_END] = __opcode_to_mem_arm(final_branch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) orig->ainsn.kprobe_direct_exec = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) flush_icache_range((unsigned long)code,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) (unsigned long)(&code[TMPL_END_IDX]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* Set op->optinsn.insn means prepared. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) op->optinsn.insn = code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) void __kprobes arch_optimize_kprobes(struct list_head *oplist)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct optimized_kprobe *op, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) list_for_each_entry_safe(op, tmp, oplist, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) unsigned long insn;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) WARN_ON(kprobe_disabled(&op->kp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * Backup instructions which will be replaced
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * by jump address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) memcpy(op->optinsn.copied_insn, op->kp.addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) RELATIVEJUMP_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) insn = arm_gen_branch((unsigned long)op->kp.addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) (unsigned long)op->optinsn.insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) BUG_ON(insn == 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * Make it a conditional branch if replaced insn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * is consitional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) insn = (__mem_to_opcode_arm(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) op->optinsn.copied_insn[0]) & 0xf0000000) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) (insn & 0x0fffffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * Similar to __arch_disarm_kprobe, operations which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * removing breakpoints must be wrapped by stop_machine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * to avoid racing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) kprobes_remove_breakpoint(op->kp.addr, insn);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) list_del_init(&op->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) void arch_unoptimize_kprobe(struct optimized_kprobe *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) arch_arm_kprobe(&op->kp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) * Recover original instructions and breakpoints from relative jumps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) * Caller must call with locking kprobe_mutex.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) void arch_unoptimize_kprobes(struct list_head *oplist,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct list_head *done_list)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) struct optimized_kprobe *op, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) list_for_each_entry_safe(op, tmp, oplist, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) arch_unoptimize_kprobe(op);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) list_move(&op->list, done_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) int arch_within_optimized_kprobe(struct optimized_kprobe *op,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) unsigned long addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return ((unsigned long)op->kp.addr <= addr &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) (unsigned long)op->kp.addr + RELATIVEJUMP_SIZE > addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) void arch_remove_optimized_kprobe(struct optimized_kprobe *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) __arch_remove_optimized_kprobe(op, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }