Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * arch/arm/plat-orion/mpp.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * MPP functions for Marvell orion SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * License version 2.  This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mbus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <plat/orion-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <plat/mpp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Address of the ith MPP control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static __init void __iomem *mpp_ctrl_addr(unsigned int i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 					  void __iomem *dev_bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	return dev_bus + (i) * 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 			   unsigned int mpp_max, void __iomem *dev_bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	unsigned int mpp_nr_regs = (1 + mpp_max/8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	u32 mpp_ctrl[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	printk(KERN_DEBUG "initial MPP regs:");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	if (mpp_nr_regs > ARRAY_SIZE(mpp_ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		printk(KERN_ERR "orion_mpp_conf: invalid mpp_max\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	for (i = 0; i < mpp_nr_regs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		mpp_ctrl[i] = readl(mpp_ctrl_addr(i, dev_bus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		printk(" %08x", mpp_ctrl[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	for ( ; *mpp_list; mpp_list++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		unsigned int num = MPP_NUM(*mpp_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		unsigned int sel = MPP_SEL(*mpp_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		int shift, gpio_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		if (num > mpp_max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 			printk(KERN_ERR "orion_mpp_conf: invalid MPP "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 					"number (%u)\n", num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 		if (variant_mask && !(*mpp_list & variant_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 			printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 			       "orion_mpp_conf: requested MPP%u config "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 			       "unavailable on this hardware\n", num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		shift = (num & 7) << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		mpp_ctrl[num / 8] &= ~(0xf << shift);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 		mpp_ctrl[num / 8] |= sel << shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 		gpio_mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 		if (*mpp_list & MPP_INPUT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 			gpio_mode |= GPIO_INPUT_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 		if (*mpp_list & MPP_OUTPUT_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 			gpio_mode |= GPIO_OUTPUT_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 		orion_gpio_set_valid(num, gpio_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	printk(KERN_DEBUG "  final MPP regs:");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	for (i = 0; i < mpp_nr_regs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 		writel(mpp_ctrl[i], mpp_ctrl_addr(i, dev_bus));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 		printk(" %08x", mpp_ctrl[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }