Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * linux/arch/arm/plat-omap/sram.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * OMAP SRAM detection and management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * Copyright (C) 2005 Nokia Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Written by Tony Lindgren <tony@atomide.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (C) 2009-2012 Texas Instruments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Added OMAP4/5 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #undef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/fncpy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/tlb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/set_memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <plat/sram.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define ROUND_DOWN(value,boundary)	((value) & (~((boundary)-1)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) static void __iomem *omap_sram_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) static unsigned long omap_sram_skip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) static unsigned long omap_sram_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static void __iomem *omap_sram_ceil;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * Memory allocator for SRAM: calculates the new ceiling address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * for pushing a function using the fncpy API.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * Note that fncpy requires the returned address to be aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * to an 8-byte boundary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static void *omap_sram_push_address(unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	unsigned long available, new_ceil = (unsigned long)omap_sram_ceil;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	available = omap_sram_ceil - (omap_sram_base + omap_sram_skip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	if (size > available) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 		pr_err("Not enough space in SRAM\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	new_ceil -= size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	new_ceil = ROUND_DOWN(new_ceil, FNCPY_ALIGN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	omap_sram_ceil = IOMEM(new_ceil);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	return (void *)omap_sram_ceil;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) void *omap_sram_push(void *funcp, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	void *sram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	unsigned long base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	int pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	void *dst = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	sram = omap_sram_push_address(size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	if (!sram)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	base = (unsigned long)sram & PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	pages = PAGE_ALIGN(size) / PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	set_memory_rw(base, pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	dst = fncpy(sram, funcp, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	set_memory_ro(base, pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	set_memory_x(base, pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	return dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  * The SRAM context is lost during off-idle and stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * needs to be reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) void omap_sram_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	omap_sram_ceil = omap_sram_base + omap_sram_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95)  * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) void __init omap_map_sram(unsigned long start, unsigned long size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 				 unsigned long skip, int cached)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	unsigned long base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	int pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	if (size == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	start = ROUND_DOWN(start, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	omap_sram_size = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	omap_sram_skip = skip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	omap_sram_base = __arm_ioremap_exec(start, size, cached);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	if (!omap_sram_base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 		pr_err("SRAM: Could not map\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	omap_sram_reset();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	 * Looks like we need to preserve some bootloader code at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	 * beginning of SRAM for jumping to flash for reboot to work...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	memset_io(omap_sram_base + omap_sram_skip, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		  omap_sram_size - omap_sram_skip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	base = (unsigned long)omap_sram_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	pages = PAGE_ALIGN(omap_sram_size) / PAGE_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	set_memory_ro(base, pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	set_memory_x(base, pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }