^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/plat-omap/debug-leds.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2011 by Bryan Wu <bryan.wu@canonical.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2003 by Texas Instruments Incorporated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/platform_data/gpio-omap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Many OMAP development platforms reuse the same "debug board"; these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * platforms include H2, H3, H4, and Perseus2. There are 16 LEDs on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * debug board (all green), accessed through FPGA registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* NOTE: most boards don't have a static mapping for the FPGA ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct h2p2_dbg_fpga {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* offset 0x00 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u16 smc91x[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* offset 0x10 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u16 fpga_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u16 board_rev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) u16 gpio_outputs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u16 leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* offset 0x18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u16 misc_inputs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u16 lan_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u16 lan_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u16 reserved0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* offset 0x20 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u16 ps2_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u16 ps2_ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* plus also 4 rs232 ports ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static struct h2p2_dbg_fpga __iomem *fpga;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static u16 fpga_led_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct dbg_led {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct led_classdev cdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u16 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static const struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) const char *trigger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) } dbg_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { "dbg:d4", "heartbeat", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { "dbg:d5", "cpu0", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) { "dbg:d6", "default-on", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { "dbg:d7", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) { "dbg:d8", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { "dbg:d9", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { "dbg:d10", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) { "dbg:d11", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) { "dbg:d12", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) { "dbg:d13", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) { "dbg:d14", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) { "dbg:d15", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) { "dbg:d16", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) { "dbg:d17", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) { "dbg:d18", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) { "dbg:d19", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * The triggers lines up below will only be used if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * LED triggers are compiled in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static void dbg_led_set(struct led_classdev *cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) enum led_brightness b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct dbg_led *led = container_of(cdev, struct dbg_led, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u16 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) reg = readw_relaxed(&fpga->leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if (b != LED_OFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) reg |= led->mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) reg &= ~led->mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) writew_relaxed(reg, &fpga->leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static enum led_brightness dbg_led_get(struct led_classdev *cdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct dbg_led *led = container_of(cdev, struct dbg_led, cdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) u16 reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) reg = readw_relaxed(&fpga->leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) return (reg & led->mask) ? LED_FULL : LED_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static int fpga_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct resource *iomem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (!iomem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) fpga = ioremap(iomem->start, resource_size(iomem));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) writew_relaxed(0xff, &fpga->leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) for (i = 0; i < ARRAY_SIZE(dbg_leds); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct dbg_led *led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) led = kzalloc(sizeof(*led), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) if (!led)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) led->cdev.name = dbg_leds[i].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) led->cdev.brightness_set = dbg_led_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) led->cdev.brightness_get = dbg_led_get;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) led->cdev.default_trigger = dbg_leds[i].trigger;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) led->mask = BIT(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) if (led_classdev_register(NULL, &led->cdev) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) kfree(led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static int fpga_suspend_noirq(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) fpga_led_state = readw_relaxed(&fpga->leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) writew_relaxed(0xff, &fpga->leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static int fpga_resume_noirq(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) writew_relaxed(~fpga_led_state, &fpga->leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static const struct dev_pm_ops fpga_dev_pm_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .suspend_noirq = fpga_suspend_noirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .resume_noirq = fpga_resume_noirq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static struct platform_driver led_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .driver.name = "omap_dbg_led",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .driver.pm = &fpga_dev_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .probe = fpga_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static int __init fpga_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (machine_is_omap_h4()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) || machine_is_omap_h3()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) || machine_is_omap_h2()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) || machine_is_omap_perseus2()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) return platform_driver_register(&led_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) fs_initcall(fpga_init);