^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) NetWinder Floating Point Emulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) (c) Rebel.com, 1998-1999
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __FPSR_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __FPSR_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) The FPSR is a 32 bit register consisting of 4 parts, each exactly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) one byte.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) SYSTEM ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) EXCEPTION TRAP ENABLE BYTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) SYSTEM CONTROL BYTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) CUMULATIVE EXCEPTION FLAGS BYTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) The FPCR is a 32 bit register consisting of bit flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) /* SYSTEM ID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Note: the system id byte is read only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) typedef unsigned int FPSR; /* type for floating point status register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) typedef unsigned int FPCR; /* type for floating point control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define MASK_SYSID 0xff000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define BIT_HARDWARE 0x80000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define FP_EMULATOR 0x01000000 /* System ID for emulator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define FP_ACCELERATOR 0x81000000 /* System ID for FPA11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* EXCEPTION TRAP ENABLE BYTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ----------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MASK_TRAP_ENABLE 0x00ff0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define MASK_TRAP_ENABLE_STRICT 0x001f0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define BIT_IXE 0x00100000 /* inexact exception enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define BIT_UFE 0x00080000 /* underflow exception enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define BIT_OFE 0x00040000 /* overflow exception enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define BIT_DZE 0x00020000 /* divide by zero exception enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define BIT_IOE 0x00010000 /* invalid operation exception enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* SYSTEM CONTROL BYTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) ---------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define MASK_SYSTEM_CONTROL 0x0000ff00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MASK_TRAP_STRICT 0x00001f00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define BIT_AC 0x00001000 /* use alternative C-flag definition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) for compares */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define BIT_EP 0x00000800 /* use expanded packed decimal format */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define BIT_SO 0x00000400 /* select synchronous operation of FPA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define BIT_NE 0x00000200 /* NaN exception bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define BIT_ND 0x00000100 /* no denormalized numbers bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* CUMULATIVE EXCEPTION FLAGS BYTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) ---------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define MASK_EXCEPTION_FLAGS 0x000000ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define MASK_EXCEPTION_FLAGS_STRICT 0x0000001f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define BIT_IXC 0x00000010 /* inexact exception flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define BIT_UFC 0x00000008 /* underflow exception flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define BIT_OFC 0x00000004 /* overfloat exception flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define BIT_DZC 0x00000002 /* divide by zero exception flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define BIT_IOC 0x00000001 /* invalid operation exception flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* Floating Point Control Register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ----------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define BIT_RU 0x80000000 /* rounded up bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define BIT_IE 0x10000000 /* inexact bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define BIT_MO 0x08000000 /* mantissa overflow bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define BIT_EO 0x04000000 /* exponent overflow bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define BIT_SB 0x00000800 /* store bounce */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define BIT_AB 0x00000400 /* arithmetic bounce */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define BIT_RE 0x00000200 /* rounding exception */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define BIT_DA 0x00000100 /* disable FPA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define MASK_OP 0x00f08010 /* AU operation code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define MASK_PR 0x00080080 /* AU precision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MASK_S1 0x00070000 /* AU source register 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define MASK_S2 0x00000007 /* AU source register 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define MASK_DS 0x00007000 /* AU destination register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define MASK_RM 0x00000060 /* AU rounding mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define MASK_ALU 0x9cfff2ff /* only ALU can write these bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define MASK_RESET 0x00000d00 /* bits set on reset, all others cleared */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define MASK_WFC MASK_RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define MASK_RFC ~MASK_RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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