Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)     NetWinder Floating Point Emulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)     (c) Rebel.com, 1998-1999
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)     Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)     27/03/03 Ian Molton Clean up CONFIG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef __FPMODULE_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define __FPMODULE_H__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define REG_ORIG_R0	17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define REG_CPSR	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define REG_PC		15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define REG_LR		14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define REG_SP		13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define REG_IP		12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define REG_FP		11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define REG_R10		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REG_R9		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define REG_R9		9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define REG_R8		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define REG_R7		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define REG_R6		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define REG_R5		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define REG_R4		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define REG_R3		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define REG_R2		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define REG_R1		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define REG_R0		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #endif