^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2012 ARM Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #ifndef __SPC_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define __SPC_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) int __init ve_spc_init(void __iomem *base, u32 a15_clusid, int irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) void ve_spc_global_wakeup_irq(bool set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) void ve_spc_cpu_wakeup_irq(u32 cluster, u32 cpu, bool set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) void ve_spc_set_resume_addr(u32 cluster, u32 cpu, u32 addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) void ve_spc_powerdown(u32 cluster, bool enable);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) int ve_spc_cpu_in_wfi(u32 cpu, u32 cluster);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #endif