Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * arch/arm/include/asm/dcscb_setup.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Created by:  Dave Martin, 2012-06-22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright:   (C) 2012-2013  Linaro Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) ENTRY(dcscb_power_up_setup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	cmp	r0, #0			@ check affinity level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	beq	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * Enable cluster-level coherency, in preparation for turning on the MMU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * The ACTLR SMP bit does not need to be set here, because cpu_resume()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * already restores that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * A15/A7 may not require explicit L2 invalidation on reset, dependent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * on hardware integration decisions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * For now, this code assumes that L2 is either already invalidated,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * or invalidation is not required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	b	cci_enable_port_for_self
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 2:	@ Implementation-specific local CPU setup operations should go here,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	@ if any.  In this case, there is nothing to do.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	bx	lr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) ENDPROC(dcscb_power_up_setup)