Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Versatile board support using the device tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 2010 Secret Lab Technologies Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *  Copyright (C) 2009 Jeremy Kerr <jeremy.kerr@canonical.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *  Copyright (C) 2004 ARM Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *  Copyright (C) 2000 Deep Blue Solutions Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/amba/bus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/amba/mmci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /* macro to get at MMIO space when running virtually */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define IO_ADDRESS(x)		(((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define __io_address(n)		((void __iomem __force *)IO_ADDRESS(n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * ------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  *  Versatile Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * ------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define VERSATILE_SYS_PCICTL_OFFSET           0x44
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define VERSATILE_SYS_MCI_OFFSET              0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37)  * VERSATILE peripheral addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define VERSATILE_MMCI0_BASE           0x10005000	/* MMC interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define VERSATILE_MMCI1_BASE           0x1000B000	/* MMC Interface */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define VERSATILE_SCTL_BASE            0x101E0000	/* System controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * System controller bit assignment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define VERSATILE_REFCLK	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define VERSATILE_TIMCLK	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define VERSATILE_TIMER1_EnSel	15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define VERSATILE_TIMER2_EnSel	17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define VERSATILE_TIMER3_EnSel	19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define VERSATILE_TIMER4_EnSel	21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static void __iomem *versatile_sys_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) unsigned int mmc_status(struct device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	struct amba_device *adev = container_of(dev, struct amba_device, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	u32 mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	if (adev->res.start == VERSATILE_MMCI0_BASE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		mask = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		mask = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	return readl(versatile_sys_base + VERSATILE_SYS_MCI_OFFSET) & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static struct mmci_platform_data mmc0_plat_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	.status		= mmc_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static struct mmci_platform_data mmc1_plat_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	.ocr_mask	= MMC_VDD_32_33|MMC_VDD_33_34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	.status		= mmc_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  * Lookup table for attaching a specific name and platform_data pointer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81)  * devices as they get created by of_platform_populate().  Ideally this table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * would not exist, but the current clock implementation depends on some devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  * having a specific name.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI0_BASE, "fpga:05", &mmc0_plat_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	OF_DEV_AUXDATA("arm,primecell", VERSATILE_MMCI1_BASE, "fpga:0b", &mmc1_plat_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	{}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static struct map_desc versatile_io_desc[] __initdata __maybe_unused = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		.virtual	=  IO_ADDRESS(VERSATILE_SCTL_BASE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		.pfn		= __phys_to_pfn(VERSATILE_SCTL_BASE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		.length		= SZ_4K * 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		.type		= MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static void __init versatile_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	debug_ll_io_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	iotable_init(versatile_io_desc, ARRAY_SIZE(versatile_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static void __init versatile_init_early(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	 * set clock frequency:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	 *	VERSATILE_REFCLK is 32KHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	 *	VERSATILE_TIMCLK is 1MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	val = readl(__io_address(VERSATILE_SCTL_BASE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	       (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	       (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	       (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	       __io_address(VERSATILE_SCTL_BASE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static void __init versatile_dt_pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	struct property *newprop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	np = of_find_compatible_node(NULL, NULL, "arm,versatile-pci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (!np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	/* Check if PCI backplane is detected */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	val = readl(versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	if (val & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		 * Enable PCI accesses. Note that the documentaton is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		 * inconsistent whether or not this is needed, but the old
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		 * driver had it so we will keep it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		writel(1, versatile_sys_base + VERSATILE_SYS_PCICTL_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		goto out_put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	newprop = kzalloc(sizeof(*newprop), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if (!newprop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		goto out_put_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	newprop->name = kstrdup("status", GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	newprop->value = kstrdup("disabled", GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	newprop->length = sizeof("disabled");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	of_update_property(np, newprop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	pr_info("Not plugged into PCI backplane!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) out_put_node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static void __init versatile_dt_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	np = of_find_compatible_node(NULL, NULL, "arm,core-module-versatile");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	if (np)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		versatile_sys_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	WARN_ON(!versatile_sys_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	versatile_dt_pci_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	of_platform_default_populate(NULL, versatile_auxdata_lookup, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static const char *const versatile_dt_match[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	"arm,versatile-ab",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	"arm,versatile-pb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	.map_io		= versatile_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	.init_early	= versatile_init_early,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	.init_machine	= versatile_dt_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	.dt_compat	= versatile_dt_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) MACHINE_END