^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2008-2009 ST-Ericsson SA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/amba/bus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/irqchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/irqchip/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/mfd/dbx500-prcmu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_data/arm-ux500-pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/outercache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/hardware/cache-l2x0.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include "db8500-regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include "pm_domains.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static int __init ux500_l2x0_unlock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void __iomem *l2x0_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) l2x0_base = of_iomap(np, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (!l2x0_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * Unlock Data and Instruction Lock if locked. Ux500 U-Boot versions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * apparently locks both caches before jumping to the kernel. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * l2x0 core will not touch the unlock registers if the l2x0 is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * already enabled, so we do it right here instead. The PL310 has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * 8 sets of registers, one per possible CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) i * L2X0_LOCKDOWN_STRIDE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) i * L2X0_LOCKDOWN_STRIDE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) iounmap(l2x0_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * We can't write to secure registers as we are in non-secure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * mode, until we have some SMI service available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * FIXME: Should we set up the GPIO domain here?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * The problem is that we cannot put the interrupt resources into the platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * device until the irqdomain has been added. Right now, we set the GIC interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * domain from init_irq(), then load the gpio driver from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * core_initcall(nmk_gpio_init) and add the platform devices from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * arch_initcall(customize_machine).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * This feels fragile because it depends on the gpio device getting probed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * _before_ any device uses the gpio interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static void __init ux500_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct resource r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) irqchip_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) prcmu_early_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) of_address_to_resource(np, 0, &r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (!r.start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) pr_err("could not find PRCMU base resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ux500_pm_init(r.start, r.end-r.start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* Unlock before init */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ux500_l2x0_unlock();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) outer_cache.write_sec = ux500_l2c310_write_sec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static void ux500_restart(enum reboot_mode mode, const char *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) local_fiq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) prcmu_system_reset(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static const struct of_device_id u8500_local_bus_nodes[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* only create devices below soc node */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) { .compatible = "stericsson,db8500", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) { .compatible = "simple-bus"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void __init u8500_init_machine(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) /* Initialize ux500 power domains */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ux500_pm_domains_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) of_platform_populate(NULL, u8500_local_bus_nodes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) NULL, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static const char * stericsson_dt_platform_compat[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) "st-ericsson,u8500",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) "st-ericsson,u9500",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .l2c_aux_val = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) .l2c_aux_mask = ~0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .init_irq = ux500_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .init_machine = u8500_init_machine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .dt_compat = stericsson_dt_platform_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .restart = ux500_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) MACHINE_END
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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