Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * arch/arm/mach-tegra/reset.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * CPU reset dispatcher.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (c) 2011, NVIDIA Corporation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef __MACH_TEGRA_RESET_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define __MACH_TEGRA_RESET_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define TEGRA_RESET_MASK_PRESENT	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define TEGRA_RESET_MASK_LP1		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define TEGRA_RESET_MASK_LP2		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define TEGRA_RESET_STARTUP_SECONDARY	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define TEGRA_RESET_STARTUP_LP2		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define TEGRA_RESET_STARTUP_LP1		5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define TEGRA_RESET_TF_PRESENT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define TEGRA_RESET_DATA_SIZE		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define RESET_DATA(x)	((TEGRA_RESET_##x)*4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "irammap.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) extern unsigned long __tegra_cpu_reset_handler_data[TEGRA_RESET_DATA_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) void __tegra_cpu_reset_handler_start(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void __tegra_cpu_reset_handler(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) void __tegra20_cpu1_resettable_status_offset(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) void __tegra_cpu_reset_handler_end(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define tegra_cpu_lp1_mask \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	(IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP1] - \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	 (u32)__tegra_cpu_reset_handler_start)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define tegra_cpu_lp2_mask \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	(IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP2] - \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	 (u32)__tegra_cpu_reset_handler_start)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define tegra_cpu_reset_handler_offset \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		((u32)__tegra_cpu_reset_handler - \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		 (u32)__tegra_cpu_reset_handler_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define tegra_cpu_reset_handler_size \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		(__tegra_cpu_reset_handler_end - \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		 __tegra_cpu_reset_handler_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) void __init tegra_cpu_reset_handler_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #endif