Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  Copyright (C) 2002 ARM Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *  All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (c) 2010, 2012-2013, NVIDIA Corporation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/clk/tegra.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <soc/tegra/common.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <soc/tegra/fuse.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/smp_plat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "sleep.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) static void (*tegra_hotplug_shutdown)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) int tegra_cpu_kill(unsigned cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	cpu = cpu_logical_map(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	/* Clock gate the CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	tegra_wait_cpu_in_reset(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	tegra_disable_cpu_clock(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * platform-specific code to shutdown a CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  * Called with IRQs disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) void tegra_cpu_die(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	if (!tegra_hotplug_shutdown) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		WARN(1, "hotplug is not yet initialized\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	/* Clean L1 data cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	tegra_disable_clean_inv_dcache(TEGRA_FLUSH_CACHE_LOUIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	/* Shut down the current CPU. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	tegra_hotplug_shutdown();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	/* Should never return here. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int __init tegra_hotplug_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	if (!IS_ENABLED(CONFIG_HOTPLUG_CPU))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	if (!soc_is_tegra())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_get_chip_id() == TEGRA20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 		tegra_hotplug_shutdown = tegra20_hotplug_shutdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && tegra_get_chip_id() == TEGRA30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) && tegra_get_chip_id() == TEGRA114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	if (IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC) && tegra_get_chip_id() == TEGRA124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 		tegra_hotplug_shutdown = tegra30_hotplug_shutdown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) pure_initcall(tegra_hotplug_init);