^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * arch/arm/mach-spear3xx/spear320.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * SPEAr320 machine source file
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2009-2012 ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Viresh Kumar <vireshk@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This file is licensed under the terms of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * License version 2. This program is licensed "as is" without any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * warranty of any kind, whether express or implied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define pr_fmt(fmt) "SPEAr320: " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/amba/pl022.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/amba/pl08x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/amba/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/of_platform.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <mach/spear.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define SPEAR320_UART1_BASE UL(0xA3000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define SPEAR320_UART2_BASE UL(0xA4000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define SPEAR320_SSP0_BASE UL(0xA5000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define SPEAR320_SSP1_BASE UL(0xA6000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* DMAC platform data's slave info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct pl08x_channel_data spear320_dma_info[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .bus_id = "uart0_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .min_signal = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .max_signal = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .bus_id = "uart0_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .min_signal = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .max_signal = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .bus_id = "ssp0_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .min_signal = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .max_signal = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .bus_id = "ssp0_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .min_signal = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .max_signal = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .bus_id = "i2c0_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .min_signal = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .max_signal = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .bus_id = "i2c0_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .min_signal = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .max_signal = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .bus_id = "irda",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .min_signal = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .max_signal = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .bus_id = "adc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .min_signal = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .max_signal = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .bus_id = "to_jpeg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .min_signal = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .max_signal = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .bus_id = "from_jpeg",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .min_signal = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .max_signal = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .muxval = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .periph_buses = PL08X_AHB1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .bus_id = "ssp1_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) .min_signal = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .max_signal = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .bus_id = "ssp1_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .min_signal = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .max_signal = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .bus_id = "ssp2_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) .min_signal = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) .max_signal = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .bus_id = "ssp2_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) .min_signal = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .max_signal = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .bus_id = "uart1_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .min_signal = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .max_signal = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .bus_id = "uart1_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .min_signal = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .max_signal = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .bus_id = "uart2_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .min_signal = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .max_signal = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .bus_id = "uart2_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .min_signal = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .max_signal = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .bus_id = "i2c1_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .min_signal = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .max_signal = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .bus_id = "i2c1_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .min_signal = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .max_signal = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .bus_id = "i2c2_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .min_signal = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .max_signal = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .bus_id = "i2c2_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) .min_signal = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .max_signal = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .bus_id = "i2s_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .min_signal = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .max_signal = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .bus_id = "i2s_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .min_signal = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .max_signal = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .bus_id = "rs485_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .min_signal = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) .max_signal = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) .bus_id = "rs485_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .min_signal = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .max_signal = 15,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .muxval = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .periph_buses = PL08X_AHB2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static struct pl022_ssp_controller spear320_ssp_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .bus_id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .enable_dma = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) .dma_filter = pl08x_filter_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .dma_tx_param = "ssp1_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .dma_rx_param = "ssp1_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .num_chipselect = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .bus_id = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) .enable_dma = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .dma_filter = pl08x_filter_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .dma_tx_param = "ssp2_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) .dma_rx_param = "ssp2_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .num_chipselect = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static struct amba_pl011_data spear320_uart_data[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .dma_filter = pl08x_filter_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .dma_tx_param = "uart1_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .dma_rx_param = "uart1_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .dma_filter = pl08x_filter_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .dma_tx_param = "uart2_tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .dma_rx_param = "uart2_rx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* Add SPEAr310 auxdata to pass platform data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) static struct of_dev_auxdata spear320_auxdata_lookup[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) &pl022_plat_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) &pl080_plat_data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP0_BASE, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) &spear320_ssp_data[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) OF_DEV_AUXDATA("arm,pl022", SPEAR320_SSP1_BASE, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) &spear320_ssp_data[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART1_BASE, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) &spear320_uart_data[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) OF_DEV_AUXDATA("arm,pl011", SPEAR320_UART2_BASE, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) &spear320_uart_data[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) {}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) static void __init spear320_dt_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) pl080_plat_data.slave_channels = spear320_dma_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear320_dma_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) of_platform_default_populate(NULL, spear320_auxdata_lookup, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) static const char * const spear320_dt_board_compat[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) "st,spear320",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) "st,spear320-evb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) "st,spear320-hmi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) struct map_desc spear320_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) .virtual = (unsigned long)VA_SPEAR320_SOC_CONFIG_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) .pfn = __phys_to_pfn(SPEAR320_SOC_CONFIG_BASE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) .length = SZ_16M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .type = MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static void __init spear320_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) iotable_init(spear320_io_desc, ARRAY_SIZE(spear320_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) spear3xx_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) .map_io = spear320_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) .init_time = spear3xx_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) .init_machine = spear320_dt_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .restart = spear_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .dt_compat = spear320_dt_board_compat,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) MACHINE_END