^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * arch/arm/mach-spear13XX/headsmp.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Picked from realview
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (c) 2012 ST Microelectronics Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) __INIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * spear13xx specific entry point for secondary CPUs. This provides
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * a "holding pen" into which all secondary cores are held until we're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * ready for them to initialise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) ENTRY(spear13xx_secondary_startup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) mrc p15, 0, r0, c0, c0, 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) and r0, r0, #15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) adr r4, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) ldmia r4, {r5, r6}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) sub r4, r4, r5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) add r6, r6, r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) pen: ldr r7, [r6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) cmp r7, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) bne pen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* re-enable coherency */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) mrc p15, 0, r0, c1, c0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) orr r0, r0, #(1 << 6) | (1 << 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) mcr p15, 0, r0, c1, c0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * we've been released from the holding pen: secondary_stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * should now contain the SVC stack for this core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) b secondary_startup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 1: .long .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .long spear_pen_release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ENDPROC(spear13xx_secondary_startup)