Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *  Copyright (c) 2003 ARM Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *  Copyright (c) u-boot contributors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  Copyright (c) 2012 Pavel Machek <pavel@denx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <asm/memory.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/assembler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	.arch	armv7-a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	.arm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) ENTRY(secondary_trampoline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	/* CPU1 will always fetch from 0x0 when it is brought out of reset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	 * Thus, we can just subtract the PAGE_OFFSET to get the physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	 * address of &cpu1start_addr. This would not work for platforms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	 * where the physical memory does not start at 0x0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) ARM_BE8(setend	be)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	adr	r0, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	ldmia	r0, {r1, r2}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	sub	r2, r2, #PAGE_OFFSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	ldr	r3, [r2]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	ldr	r4, [r3]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) ARM_BE8(rev	r4, r4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	bx	r4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	.align
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 1:	.long	.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	.long	socfpga_cpu1start_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) ENTRY(secondary_trampoline_end)