Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * SMP support for Emma Mobile EV2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2012  Renesas Solutions Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2012  Magnus Damm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/smp_plat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/smp_scu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "emev2.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define EMEV2_SCU_BASE 0x1e000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define EMEV2_SMU_BASE 0xe0110000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define SMU_GENERAL_REG0 0x7c0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	void __iomem *smu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	/* Tell ROM loader about our vector (in headsmp.S) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	if (smu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		iounmap(smu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	/* setup EMEV2 specific SCU bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	shmobile_smp_scu_prepare_cpus(EMEV2_SCU_BASE, max_cpus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) const struct smp_operations emev2_smp_ops __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	.smp_prepare_cpus	= emev2_smp_prepare_cpus,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	.smp_boot_secondary	= emev2_boot_secondary,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };