Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * R-Car Generation 2 da9063(L)/da9210 regulator quirk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Certain Gen2 development boards have an da9063 and one or more da9210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * regulators. All of these regulators have their interrupt request lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * tied to the same interrupt pin (IRQ2) on the SoC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * After cold boot or da9063-induced restart, both the da9063 and da9210 seem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * to assert their interrupt request lines.  Hence as soon as one driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * requests this irq, it gets stuck in an interrupt storm, as it only manages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * to deassert its own interrupt request line, and the other driver hasn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * installed an interrupt handler yet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * To handle this, install a quirk that masks the interrupts in both the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  * da9063 and da9210.  This quirk has to run after the i2c master driver has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * been initialized, but before the i2c slave drivers are initialized.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * Copyright (C) 2015 Glider bvba
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/i2c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/notifier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/of_irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/mfd/da9063/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define IRQC_BASE		0xe61c0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define IRQC_MONITOR		0x104	/* IRQn Signal Level Monitor Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define REGULATOR_IRQ_MASK	BIT(2)	/* IRQ2, active low */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /* start of DA9210 System Control and Event Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define DA9210_REG_MASK_A		0x54
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) struct regulator_quirk {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct list_head		list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	const struct of_device_id	*id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct device_node		*np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct of_phandle_args		irq_args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct i2c_msg			i2c_msg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	bool				shared;	/* IRQ line is shared */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) static LIST_HEAD(quirk_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) static void __iomem *irqc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) /* first byte sets the memory pointer, following are consecutive reg values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) static u8 da9063_irq_clr[] = { DA9063_REG_IRQ_MASK_A, 0xff, 0xff, 0xff, 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) static u8 da9210_irq_clr[] = { DA9210_REG_MASK_A, 0xff, 0xff };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) static struct i2c_msg da9063_msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	.len = ARRAY_SIZE(da9063_irq_clr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	.buf = da9063_irq_clr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static struct i2c_msg da9210_msg = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	.len = ARRAY_SIZE(da9210_irq_clr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	.buf = da9210_irq_clr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) static const struct of_device_id rcar_gen2_quirk_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	{ .compatible = "dlg,da9063", .data = &da9063_msg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	{ .compatible = "dlg,da9063l", .data = &da9063_msg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	{ .compatible = "dlg,da9210", .data = &da9210_msg },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	{},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static int regulator_quirk_notify(struct notifier_block *nb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 				  unsigned long action, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	struct regulator_quirk *pos, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	struct device *dev = data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	struct i2c_client *client;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	static bool done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	u32 mon;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	if (done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	mon = ioread32(irqc + IRQC_MONITOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	dev_dbg(dev, "%s: %ld, IRQC_MONITOR = 0x%x\n", __func__, action, mon);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	if (mon & REGULATOR_IRQ_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		goto remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	if (action != BUS_NOTIFY_ADD_DEVICE || dev->type == &i2c_adapter_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	client = to_i2c_client(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	dev_dbg(dev, "Detected %s\n", client->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	 * Send message to all PMICs that share an IRQ line to deassert it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	 * WARNING: This works only if all the PMICs are on the same I2C bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	list_for_each_entry(pos, &quirk_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		if (!pos->shared)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		if (pos->np->parent != client->dev.parent->of_node)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 		dev_info(&client->dev, "clearing %s@0x%02x interrupts\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 			 pos->id->compatible, pos->i2c_msg.addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 		ret = i2c_transfer(client->adapter, &pos->i2c_msg, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 		if (ret != 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 			dev_err(&client->dev, "i2c error %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	mon = ioread32(irqc + IRQC_MONITOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	if (mon & REGULATOR_IRQ_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 		goto remove;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) remove:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	dev_info(dev, "IRQ2 is not asserted, removing quirk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	list_for_each_entry_safe(pos, tmp, &quirk_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 		list_del(&pos->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 		kfree(pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	done = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	iounmap(irqc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static struct notifier_block regulator_quirk_nb = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.notifier_call = regulator_quirk_notify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int __init rcar_gen2_regulator_quirk(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	struct regulator_quirk *quirk, *pos, *tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	struct of_phandle_args *argsa, *argsb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	const struct of_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	struct device_node *np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	u32 mon, addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	if (!of_machine_is_compatible("renesas,koelsch") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	    !of_machine_is_compatible("renesas,lager") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	    !of_machine_is_compatible("renesas,porter") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	    !of_machine_is_compatible("renesas,stout") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	    !of_machine_is_compatible("renesas,gose"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	for_each_matching_node_and_match(np, rcar_gen2_quirk_match, &id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		if (!of_device_is_available(np)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 		ret = of_property_read_u32(np, "reg", &addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		if (ret)	/* Skip invalid entry and continue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 		quirk = kzalloc(sizeof(*quirk), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 		if (!quirk) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 			ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			of_node_put(np);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 			goto err_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		argsa = &quirk->irq_args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 		memcpy(&quirk->i2c_msg, id->data, sizeof(quirk->i2c_msg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 		quirk->id = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 		quirk->np = np;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 		quirk->i2c_msg.addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		ret = of_irq_parse_one(np, 0, argsa);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		if (ret) {	/* Skip invalid entry and continue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 			kfree(quirk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		list_for_each_entry(pos, &quirk_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 			argsb = &pos->irq_args;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 			if (argsa->args_count != argsb->args_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 			ret = memcmp(argsa->args, argsb->args,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 				     argsa->args_count *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 				     sizeof(argsa->args[0]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			if (!ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 				pos->shared = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 				quirk->shared = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		list_add_tail(&quirk->list, &quirk_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	irqc = ioremap(IRQC_BASE, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	if (!irqc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 		goto err_mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	mon = ioread32(irqc + IRQC_MONITOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	if (mon & REGULATOR_IRQ_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		pr_debug("%s: IRQ2 is not asserted, not installing quirk\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 			 __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		goto err_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	pr_info("IRQ2 is asserted, installing regulator quirk\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	bus_register_notifier(&i2c_bus_type, &regulator_quirk_nb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) err_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	iounmap(irqc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) err_mem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	list_for_each_entry_safe(pos, tmp, &quirk_list, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		list_del(&pos->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		kfree(pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) arch_initcall(rcar_gen2_regulator_quirk);