^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/arm/mach-sa1100/shannon.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/gpio/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/platform_data/sa11x0-serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/regulator/fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regulator/machine.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <video/sa1100fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/platform_data/mfd-mcp-sa11x0.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <mach/shannon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static struct mtd_partition shannon_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .name = "BLOB boot loader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) .size = 0x20000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .name = "kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) .size = 0xe0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .name = "initrd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .offset = MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .size = MTDPART_SIZ_FULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) static struct flash_platform_data shannon_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .map_name = "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .parts = shannon_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .nr_parts = ARRAY_SIZE(shannon_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static struct resource shannon_flash_resource =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static struct mcp_plat_data shannon_mcp_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .mccr0 = MCCR0_ADM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .sclk_rate = 11981000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static struct sa1100fb_mach_info shannon_lcd_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .pixclock = 152500, .bpp = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .xres = 640, .yres = 480,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .hsync_len = 4, .vsync_len = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .left_margin = 2, .upper_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .right_margin = 1, .lower_margin = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .lccr3 = LCCR3_ACBsDiv(512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static struct gpiod_lookup_table shannon_pcmcia0_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .dev_id = "sa11x0-pcmcia.0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) GPIO_LOOKUP("gpio", 24, "detect", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) GPIO_LOOKUP("gpio", 26, "ready", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static struct gpiod_lookup_table shannon_pcmcia1_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .dev_id = "sa11x0-pcmcia.1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) GPIO_LOOKUP("gpio", 25, "detect", GPIO_ACTIVE_LOW),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) GPIO_LOOKUP("gpio", 27, "ready", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static struct regulator_consumer_supply shannon_cf_vcc_consumers[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.0"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static struct fixed_voltage_config shannon_cf_vcc_pdata __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .supply_name = "cf-power",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .microvolts = 3300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .enabled_at_boot = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static struct gpiod_lookup_table shannon_display_gpio_table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .dev_id = "sa11x0-fb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .table = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) GPIO_LOOKUP("gpio", 22, "shannon-lcden", GPIO_ACTIVE_HIGH),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static void __init shannon_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) sa11x0_register_fixed_regulator(0, &shannon_cf_vcc_pdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) shannon_cf_vcc_consumers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ARRAY_SIZE(shannon_cf_vcc_consumers),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) sa11x0_register_pcmcia(0, &shannon_pcmcia0_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) sa11x0_register_pcmcia(1, &shannon_pcmcia1_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) sa11x0_ppc_configure_mcp();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) gpiod_add_lookup_table(&shannon_display_gpio_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) sa11x0_register_lcd(&shannon_lcd_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) sa11x0_register_mcp(&shannon_mcp_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static void __init shannon_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) sa1100_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) sa1100_register_uart(0, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) sa1100_register_uart(1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) Ser1SDCR0 |= SDCR0_SUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) GPDR &= ~GPIO_UART_RXD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) PPAR |= PPAR_UPR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* reset the codec */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) GPCR = SHANNON_GPIO_CODEC_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) GPSR = SHANNON_GPIO_CODEC_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) .atag_offset = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) .map_io = shannon_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) .nr_irqs = SA1100_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .init_irq = sa1100_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .init_time = sa1100_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .init_machine = shannon_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .init_late = sa11x0_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .restart = sa11x0_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) MACHINE_END