Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * linux/arch/arm/mach-sa1100/pleb.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/platform_data/sa11x0-serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/smc91x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * Ethernet IRQ mappings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define PLEB_ETH0_P		(0x20000300)	/* Ethernet 0 in PCMCIA0 IO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define PLEB_ETH0_V		(0xf6000300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define GPIO_ETH0_IRQ		GPIO_GPIO(21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define GPIO_ETH0_EN		GPIO_GPIO(26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define IRQ_GPIO_ETH0_IRQ	IRQ_GPIO21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) static struct resource smc91x_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	[0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #if 0 /* Autoprobe instead, to get rising/falling edge characteristic right */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	[1] = DEFINE_RES_IRQ(IRQ_GPIO_ETH0_IRQ),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) static struct smc91x_platdata smc91x_platdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	.flags = SMC91X_USE_16BIT | SMC91X_USE_8BIT | SMC91X_NOWAIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static struct platform_device smc91x_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	.name		= "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	.id		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	.num_resources	= ARRAY_SIZE(smc91x_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	.resource	= smc91x_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	.dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 		.platform_data  = &smc91x_platdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) static struct platform_device *devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	&smc91x_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)  * Pleb's memory map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * has flash memory (typically 4 or 8 meg) selected by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  * the two SA1100 lowest chip select outputs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static struct resource pleb_flash_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	[0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	[1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) static struct mtd_partition pleb_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		.name		= "blob",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		.offset		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		.size		= 0x00020000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		.name		= "kernel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		.offset		= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		.size		= 0x000e0000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		.name		= "rootfs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		.offset		= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		.size		= 0x00300000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) static struct flash_platform_data pleb_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.map_name = "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.parts = pleb_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	.nr_parts = ARRAY_SIZE(pleb_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) static void __init pleb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	sa11x0_register_mtd(&pleb_flash_data, pleb_flash_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			      ARRAY_SIZE(pleb_flash_resources));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	platform_add_devices(devices, ARRAY_SIZE(devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static void __init pleb_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	sa1100_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	sa1100_register_uart(0, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	sa1100_register_uart(1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	GPDR |= GPIO_UART_TXD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	GPDR &= ~GPIO_UART_RXD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	PPAR |= PPAR_UPR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	 * Fix expansion memory timing for network card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	MECR = ((2<<10) | (2<<5) | (2<<0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	 * Enable the SMC ethernet controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	GPDR |= GPIO_ETH0_EN;	/* set to output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	GPCR  = GPIO_ETH0_EN;	/* clear MCLK (enable smc) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	GPDR &= ~GPIO_ETH0_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	irq_set_irq_type(GPIO_ETH0_IRQ, IRQ_TYPE_EDGE_FALLING);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) MACHINE_START(PLEB, "PLEB")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	.map_io		= pleb_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	.nr_irqs	= SA1100_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	.init_irq	= sa1100_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	.init_time	= sa1100_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	.init_machine   = pleb_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	.init_late	= sa11x0_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	.restart	= sa11x0_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) MACHINE_END