Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * linux/arch/arm/mach-sa1100/badge4.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * BadgePAD 4 specific initialization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *   Tim Connors <connors@hpl.hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *   Christopher Hoover <ch@hpl.hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (C) 2002 Hewlett-Packard Company
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/platform_data/sa11x0-serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <mach/hardware.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <asm/mach-types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <asm/hardware/sa1111.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <mach/badge4.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include "generic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) static struct resource sa1111_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	[0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	[1] = DEFINE_RES_IRQ(BADGE4_IRQ_GPIO_SA1111),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) static int badge4_sa1111_enable(void *data, unsigned devid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	if (devid == SA1111_DEVID_USB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 		badge4_set_5V(BADGE4_5V_USB, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) static void badge4_sa1111_disable(void *data, unsigned devid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	if (devid == SA1111_DEVID_USB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		badge4_set_5V(BADGE4_5V_USB, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static struct sa1111_platform_data sa1111_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	.disable_devs	= SA1111_DEVID_PS2_MSE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	.enable		= badge4_sa1111_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	.disable	= badge4_sa1111_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) static u64 sa1111_dmamask = 0xffffffffUL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static struct platform_device sa1111_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.name		= "sa1111",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	.id		= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	.dev		= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		.dma_mask = &sa1111_dmamask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		.coherent_dma_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		.platform_data = &sa1111_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	.num_resources	= ARRAY_SIZE(sa1111_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	.resource	= sa1111_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) /* LEDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) struct gpio_led badge4_gpio_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		.name			= "badge4:red",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		.default_trigger	= "heartbeat",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		.gpio			= 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		.name			= "badge4:green",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		.default_trigger	= "cpu0",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		.gpio			= 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) static struct gpio_led_platform_data badge4_gpio_led_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	.leds		= badge4_gpio_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	.num_leds	= ARRAY_SIZE(badge4_gpio_leds),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) static struct platform_device badge4_leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.name	= "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	.id	= -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.dev	= {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 		.platform_data	= &badge4_gpio_led_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static struct platform_device *devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	&sa1111_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	&badge4_leds,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int __init badge4_sa1111_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	 * Ensure that the memory bus request/grant signals are setup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	 * and the grant is held in its inactive state
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	sa1110_mb_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	 * Probe for SA1111.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	return platform_add_devices(devices, ARRAY_SIZE(devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)  * 1 x Intel 28F320C3 Advanced+ Boot Block Flash (32 Mi bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)  *   Eight 4 KiW Parameter Bottom Blocks (64 KiB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)  *   Sixty-three 32 KiW Main Blocks (4032 Ki b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)  * <or>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)  * 1 x Intel 28F640C3 Advanced+ Boot Block Flash (64 Mi bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)  *   Eight 4 KiW Parameter Bottom Blocks (64 KiB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)  *   One-hundred-twenty-seven 32 KiW Main Blocks (8128 Ki b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static struct mtd_partition badge4_partitions[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		.name	= "BLOB boot loader",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 		.offset	= 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		.size	= 0x0000A000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 		.name	= "params",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		.offset	= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 		.size	= 0x00006000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	}, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 		.name	= "root",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 		.offset	= MTDPART_OFS_APPEND,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		.size	= MTDPART_SIZ_FULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static struct flash_platform_data badge4_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	.map_name	= "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	.parts		= badge4_partitions,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	.nr_parts	= ARRAY_SIZE(badge4_partitions),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static struct resource badge4_flash_resource =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static int five_v_on __initdata = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int __init five_v_on_setup(char *ignore)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	five_v_on = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) __setup("five_v_on", five_v_on_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static int __init badge4_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	if (!machine_is_badge4())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	/* LCD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	GPCR  = (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		 BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		 BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		 BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		 BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		 BADGE4_GPIO_GPC_VID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	GPDR &= ~BADGE4_GPIO_INT_VID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		 BADGE4_GPIO_LGP4 | BADGE4_GPIO_LGP5 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		 BADGE4_GPIO_LGP6 | BADGE4_GPIO_LGP7 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		 BADGE4_GPIO_LGP8 | BADGE4_GPIO_LGP9 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		 BADGE4_GPIO_GPA_VID | BADGE4_GPIO_GPB_VID |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		 BADGE4_GPIO_GPC_VID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	/* SDRAM SPD i2c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	GPCR  = (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	/* uart */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	GPCR  = (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	/* CPLD muxsel0 input for mux/adc chip select */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	GPCR  = BADGE4_GPIO_MUXSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	GPDR |= BADGE4_GPIO_MUXSEL0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	/* test points: J5, J6 as inputs, J7 outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	GPCR  = BADGE4_GPIO_TESTPT_J7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	GPDR |= BADGE4_GPIO_TESTPT_J7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	/* 5V supply rail. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	GPCR  = BADGE4_GPIO_PCMEN5V;		/* initially off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	GPDR |= BADGE4_GPIO_PCMEN5V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	/* CPLD sdram type inputs; set up by blob */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	//GPDR |= (BADGE4_GPIO_SDTYP1 | BADGE4_GPIO_SDTYP0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	printk(KERN_DEBUG __FILE__ ": SDRAM CPLD typ1=%d typ0=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 		!!(GPLR & BADGE4_GPIO_SDTYP1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		!!(GPLR & BADGE4_GPIO_SDTYP0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	/* SA1111 reset pin; set up by blob */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	//GPSR  = BADGE4_GPIO_SA1111_NRST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	//GPDR |= BADGE4_GPIO_SA1111_NRST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	/* power management cruft */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	PGSR = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	PWER = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	PCFR = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	PSDR = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	PWER |= PWER_GPIO26;	/* wake up on an edge from TESTPT_J5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	PWER |= PWER_RTC;	/* wake up if rtc fires */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	/* drive sa1111_nrst during sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	PGSR |= BADGE4_GPIO_SA1111_NRST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	/* drive CPLD as is during sleep */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	PGSR |= (GPLR & (BADGE4_GPIO_SDTYP0|BADGE4_GPIO_SDTYP1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	/* Now bring up the SA-1111. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	ret = badge4_sa1111_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		printk(KERN_ERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			"%s: SA-1111 initialization failed (%d)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 			__func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	/* maybe turn on 5v0 from the start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	badge4_set_5V(BADGE4_5V_INITIALLY, five_v_on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	sa11x0_register_mtd(&badge4_flash_data, &badge4_flash_resource, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) arch_initcall(badge4_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static unsigned badge4_5V_bitmap = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) void badge4_set_5V(unsigned subsystem, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	unsigned old_5V_bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	old_5V_bitmap = badge4_5V_bitmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		badge4_5V_bitmap |= subsystem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		badge4_5V_bitmap &= ~subsystem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	/* detect on->off and off->on transitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	if ((!old_5V_bitmap) && (badge4_5V_bitmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		/* was off, now on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		printk(KERN_INFO "%s: enabling 5V supply rail\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 		GPSR = BADGE4_GPIO_PCMEN5V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	} else if ((old_5V_bitmap) && (!badge4_5V_bitmap)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 		/* was on, now off */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		printk(KERN_INFO "%s: disabling 5V supply rail\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 		GPCR = BADGE4_GPIO_PCMEN5V;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) EXPORT_SYMBOL(badge4_set_5V);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) static struct map_desc badge4_io_desc[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	{	/* SRAM  bank 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		.virtual	= 0xf1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		.pfn		= __phys_to_pfn(0x08000000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		.length		= 0x00100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		.type		= MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	}, {	/* SRAM  bank 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		.virtual	= 0xf2000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 		.pfn		= __phys_to_pfn(0x10000000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 		.length		= 0x00100000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 		.type		= MT_DEVICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) badge4_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	if (!state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 		Ser1SDCR0 |= SDCR0_UART;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static struct sa1100_port_fns badge4_port_fns __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	.pm		= badge4_uart_pm,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static void __init badge4_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	sa1100_map_io();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	sa1100_register_uart_fns(&badge4_port_fns);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	sa1100_register_uart(0, 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	sa1100_register_uart(1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) MACHINE_START(BADGE4, "Hewlett-Packard Laboratories BadgePAD 4")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	.atag_offset	= 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	.map_io		= badge4_map_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	.nr_irqs	= SA1100_NR_IRQS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	.init_irq	= sa1100_init_irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	.init_late	= sa11x0_init_late,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	.init_time	= sa1100_timer_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) #ifdef CONFIG_SA1111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	.dma_zone_size	= SZ_1M,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	.restart	= sa11x0_restart,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) MACHINE_END