^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2011 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * http://www.samsung.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 2008 Openmoko, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * S3C Platform - SDHCI (HSMMC) platform data definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifndef __PLAT_S3C_SDHCI_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define __PLAT_S3C_SDHCI_H __FILE__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/platform_data/mmc-sdhci-s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * @pd: The default platform data for this device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * @set: Pointer to the platform data to fill in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) extern void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct s3c_sdhci_platdata *set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * @pd: Platform data to register to device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * Register the given platform data for use withe S3C SDHCI device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * The call will copy the platform data, so the board definitions can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * make the structure itself __initdata.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /* Default platform data, exported so that per-cpu initialisation can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * set the correct one when there are more than one cpu type selected.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Helper function availability */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* S3C2416 SDHCI setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #ifdef CONFIG_S3C2416_SETUP_SDHCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static inline void s3c2416_default_sdhci0(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #ifdef CONFIG_S3C_DEV_HSMMC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif /* CONFIG_S3C_DEV_HSMMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static inline void s3c2416_default_sdhci1(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #ifdef CONFIG_S3C_DEV_HSMMC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #endif /* CONFIG_S3C_DEV_HSMMC1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static inline void s3c2416_default_sdhci0(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static inline void s3c2416_default_sdhci1(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #endif /* CONFIG_S3C2416_SETUP_SDHCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* S3C64XX SDHCI setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #ifdef CONFIG_S3C64XX_SETUP_SDHCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static inline void s3c6400_default_sdhci0(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #ifdef CONFIG_S3C_DEV_HSMMC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) static inline void s3c6400_default_sdhci1(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #ifdef CONFIG_S3C_DEV_HSMMC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) static inline void s3c6400_default_sdhci2(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #ifdef CONFIG_S3C_DEV_HSMMC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static inline void s3c6410_default_sdhci0(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #ifdef CONFIG_S3C_DEV_HSMMC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) static inline void s3c6410_default_sdhci1(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #ifdef CONFIG_S3C_DEV_HSMMC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static inline void s3c6410_default_sdhci2(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #ifdef CONFIG_S3C_DEV_HSMMC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static inline void s3c6410_default_sdhci0(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static inline void s3c6410_default_sdhci1(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static inline void s3c6410_default_sdhci2(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static inline void s3c6400_default_sdhci0(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static inline void s3c6400_default_sdhci1(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static inline void s3c6400_default_sdhci2(void) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #endif /* CONFIG_S3C64XX_SETUP_SDHCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static inline void s3c_sdhci_setname(int id, char *name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #ifdef CONFIG_S3C_DEV_HSMMC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) s3c_device_hsmmc0.name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #ifdef CONFIG_S3C_DEV_HSMMC1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) s3c_device_hsmmc1.name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #ifdef CONFIG_S3C_DEV_HSMMC2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) s3c_device_hsmmc2.name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #ifdef CONFIG_S3C_DEV_HSMMC3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) s3c_device_hsmmc3.name = name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #endif /* __PLAT_S3C_SDHCI_H */