Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *		http://www.samsung.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright 2008 Openmoko, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *	Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *	http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Common Header for S3C64XX machines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #ifndef __ARCH_ARM_MACH_S3C64XX_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define __ARCH_ARM_MACH_S3C64XX_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) void s3c64xx_init_irq(u32 vic0, u32 vic1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) void s3c64xx_init_io(struct map_desc *mach_desc, int size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) struct device_node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) void s3c64xx_set_xtal_freq(unsigned long freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) void s3c64xx_set_xusbxti_freq(unsigned long freq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #ifdef CONFIG_CPU_S3C6400
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) extern  int s3c6400_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) extern void s3c6400_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) extern void s3c6400_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define s3c6400_map_io NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define s3c6400_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #ifdef CONFIG_CPU_S3C6410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) extern  int s3c6410_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) extern void s3c6410_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) extern void s3c6410_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define s3c6410_map_io NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define s3c6410_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #ifdef CONFIG_S3C64XX_PL080
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) extern struct pl08x_platform_data s3c64xx_dma0_plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) extern struct pl08x_platform_data s3c64xx_dma1_plat_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /* Samsung HR-Timer Clock mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) enum s3c64xx_timer_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	S3C64XX_PWM0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	S3C64XX_PWM1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	S3C64XX_PWM2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	S3C64XX_PWM3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	S3C64XX_PWM4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) extern void __init s3c64xx_set_timer_source(enum s3c64xx_timer_mode event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 					    enum s3c64xx_timer_mode source);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) extern void __init s3c64xx_timer_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */