Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) // Copyright 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) // Copyright 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) //	Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) //	http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * NOTE: Code in this file is not used when booting with Device Tree support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/soc/samsung/s3c-pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include "regs-clock.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include "sdhci.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include "adc-core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "iic-core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include "ata-core-s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include "s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include "onenand-core-s3c64xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) void __init s3c6410_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	/* initialise device information early */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	s3c6410_default_sdhci0();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	s3c6410_default_sdhci1();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	s3c6410_default_sdhci2();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	/* the i2c devices are directly compatible with s3c2440 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	s3c_i2c0_setname("s3c2440-i2c");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	s3c_i2c1_setname("s3c2440-i2c");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	s3c_adc_setname("s3c64xx-adc");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	s3c_device_nand.name = "s3c6400-nand";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	s3c_onenand_setname("s3c6410-onenand");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	s3c64xx_onenand1_setname("s3c6410-onenand");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	s3c_cfcon_setname("s3c64xx-pata");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) void __init s3c6410_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	/* VIC0 is missing IRQ7, VIC1 is fully populated. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	s3c64xx_init_irq(~0 & ~(1 << 7), ~0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct bus_type s3c6410_subsys = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	.name		= "s3c6410-core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	.dev_name	= "s3c6410-core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static struct device s3c6410_dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	.bus	= &s3c6410_subsys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static int __init s3c6410_core_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 	/* Not applicable when using DT. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	if (of_have_populated_dt() || !soc_is_s3c64xx())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	return subsys_system_register(&s3c6410_subsys, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) core_initcall(s3c6410_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int __init s3c6410_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 	printk("S3C6410: Initialising architecture\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 	return device_register(&s3c6410_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }