^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2012 Samsung Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * http://www.samsung.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Common Header for S3C24XX SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <mach/irqs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) struct s3c2410_uartcfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #ifdef CONFIG_CPU_S3C2410
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) extern int s3c2410_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern int s3c2410a_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) extern void s3c2410_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) extern void s3c2410_init_clocks(int xtal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) extern void s3c2410_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define s3c2410_init_clocks NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define s3c2410_init_uarts NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define s3c2410_map_io NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define s3c2410_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define s3c2410a_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #ifdef CONFIG_CPU_S3C2412
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) extern int s3c2412_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) extern void s3c2412_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) extern void s3c2412_init_clocks(int xtal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) extern int s3c2412_baseclk_add(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern void s3c2412_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define s3c2412_init_clocks NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define s3c2412_init_uarts NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define s3c2412_map_io NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define s3c2412_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #ifdef CONFIG_CPU_S3C2416
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) extern int s3c2416_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) extern void s3c2416_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) extern void s3c2416_init_clocks(int xtal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern int s3c2416_baseclk_add(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) extern void s3c2416_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) extern struct syscore_ops s3c2416_irq_syscore_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define s3c2416_init_clocks NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define s3c2416_init_uarts NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define s3c2416_map_io NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define s3c2416_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) extern void s3c244x_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define s3c244x_init_uarts NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #ifdef CONFIG_CPU_S3C2440
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) extern int s3c2440_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) extern void s3c2440_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) extern void s3c2440_init_clocks(int xtal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) extern void s3c2440_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define s3c2440_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define s3c2440_map_io NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #ifdef CONFIG_CPU_S3C2442
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) extern int s3c2442_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) extern void s3c2442_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) extern void s3c2442_init_clocks(int xtal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) extern void s3c2442_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define s3c2442_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define s3c2442_map_io NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #ifdef CONFIG_CPU_S3C2443
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) extern int s3c2443_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) extern void s3c2443_map_io(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) extern void s3c2443_init_clocks(int xtal);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) extern int s3c2443_baseclk_add(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) extern void s3c2443_init_irq(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define s3c2443_init_clocks NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define s3c2443_init_uarts NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define s3c2443_map_io NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define s3c2443_init NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) extern struct syscore_ops s3c24xx_irq_syscore_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) extern struct platform_device s3c2410_device_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) extern struct platform_device s3c2412_device_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) extern struct platform_device s3c2440_device_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) extern struct platform_device s3c2443_device_dma;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) extern struct platform_device s3c2410_device_dclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) enum s3c24xx_timer_mode {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) S3C24XX_PWM0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) S3C24XX_PWM1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) S3C24XX_PWM2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) S3C24XX_PWM3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) S3C24XX_PWM4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) extern void __init s3c24xx_set_timer_source(enum s3c24xx_timer_mode event,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) enum s3c24xx_timer_mode source);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) extern void __init s3c24xx_timer_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags