^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (c) 2004-2006 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Samsung S3C2440 and S3C2442 Mobile CPU support (not S3C2443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/timer.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/serial_core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/serial_s3c.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/syscore_ops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/system_misc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/mach/arch.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/mach/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/mach/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include "regs-clock.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include "regs-gpio.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include "devs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include "cpu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include "pm.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include "s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include "nand-core-s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include "regs-dsc-s3c24xx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static struct map_desc s3c244x_iodesc[] __initdata __maybe_unused = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) IODESC_ENT(CLKPWR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) IODESC_ENT(TIMER),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) IODESC_ENT(WATCHDOG),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* uart initialisation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void __init s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) void __init s3c244x_map_io(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* register our io-tables */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) iotable_init(s3c244x_iodesc, ARRAY_SIZE(s3c244x_iodesc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* rename any peripherals used differing from the s3c2410 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) s3c_device_sdi.name = "s3c2440-sdi";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) s3c_device_i2c0.name = "s3c2440-i2c";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) s3c_nand_setname("s3c2440-nand");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) s3c_device_ts.name = "s3c2440-ts";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) s3c_device_usbgadget.name = "s3c2440-usbgadget";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) s3c2410_device_dclk.name = "s3c2440-dclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* Since the S3C2442 and S3C2440 share items, put both subsystems here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct bus_type s3c2440_subsys = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .name = "s3c2440-core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .dev_name = "s3c2440-core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct bus_type s3c2442_subsys = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .name = "s3c2442-core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .dev_name = "s3c2442-core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* need to register the subsystem before we actually register the device, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * we also need to ensure that it has been initialised before any of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * drivers even try to use it (even if not on an s3c2440 based system)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * as a driver which may support both 2410 and 2440 may try and use it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int __init s3c2440_core_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return subsys_system_register(&s3c2440_subsys, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) core_initcall(s3c2440_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static int __init s3c2442_core_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return subsys_system_register(&s3c2442_subsys, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) core_initcall(s3c2442_core_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #ifdef CONFIG_PM_SLEEP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static struct sleep_save s3c244x_sleep[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) SAVE_ITEM(S3C2440_DSC0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) SAVE_ITEM(S3C2440_DSC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) SAVE_ITEM(S3C2440_GPJDAT),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) SAVE_ITEM(S3C2440_GPJCON),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) SAVE_ITEM(S3C2440_GPJUP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static int s3c244x_suspend(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) s3c_pm_do_save(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static void s3c244x_resume(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct syscore_ops s3c244x_pm_syscore_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .suspend = s3c244x_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .resume = s3c244x_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #endif