Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright 2008 Openmoko, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *      Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *      http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * S3C64XX - GPIO memory port register definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __MACH_S3C64XX_REGS_GPIO_MEMPORT_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __MACH_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define S3C64XX_MEM0CONSTOP	S3C64XX_GPIOREG(0x1B0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define S3C64XX_MEM1CONSTOP	S3C64XX_GPIOREG(0x1B4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define S3C64XX_MEM0CONSLP0	S3C64XX_GPIOREG(0x1C0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define S3C64XX_MEM0CONSLP1	S3C64XX_GPIOREG(0x1C4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define S3C64XX_MEM1CONSLP	S3C64XX_GPIOREG(0x1C8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define S3C64XX_MEM0DRVCON	S3C64XX_GPIOREG(0x1D0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define S3C64XX_MEM1DRVCON	S3C64XX_GPIOREG(0x1D4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif /* __MACH_S3C64XX_REGS_GPIO_MEMPORT_H */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)