^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) // Copyright (c) 2006-2007 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) // http://armlinux.simtec.co.uk/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) // Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) // Vincent Sanders <vince@arm.linux.org.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) //
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) // S3C2410 CPU PLL tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/soc/samsung/s3c-cpufreq-core.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/soc/samsung/s3c-pm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* This array should be sorted in ascending order of the frequencies */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static struct cpufreq_frequency_table pll_vals_12MHz[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) { .frequency = 34000000, .driver_data = PLLVAL(82, 2, 3), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) { .frequency = 45000000, .driver_data = PLLVAL(82, 1, 3), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) { .frequency = 48000000, .driver_data = PLLVAL(120, 2, 3), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) { .frequency = 51000000, .driver_data = PLLVAL(161, 3, 3), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) { .frequency = 56000000, .driver_data = PLLVAL(142, 2, 3), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) { .frequency = 68000000, .driver_data = PLLVAL(82, 2, 2), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) { .frequency = 79000000, .driver_data = PLLVAL(71, 1, 2), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) { .frequency = 85000000, .driver_data = PLLVAL(105, 2, 2), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) { .frequency = 90000000, .driver_data = PLLVAL(112, 2, 2), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) { .frequency = 101000000, .driver_data = PLLVAL(127, 2, 2), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) { .frequency = 113000000, .driver_data = PLLVAL(105, 1, 2), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) { .frequency = 118000000, .driver_data = PLLVAL(150, 2, 2), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) { .frequency = 124000000, .driver_data = PLLVAL(116, 1, 2), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) { .frequency = 135000000, .driver_data = PLLVAL(82, 2, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) { .frequency = 147000000, .driver_data = PLLVAL(90, 2, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) { .frequency = 152000000, .driver_data = PLLVAL(68, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) { .frequency = 158000000, .driver_data = PLLVAL(71, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) { .frequency = 170000000, .driver_data = PLLVAL(77, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) { .frequency = 180000000, .driver_data = PLLVAL(82, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) { .frequency = 186000000, .driver_data = PLLVAL(85, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) { .frequency = 192000000, .driver_data = PLLVAL(88, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) { .frequency = 203000000, .driver_data = PLLVAL(161, 3, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* 2410A extras */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) { .frequency = 210000000, .driver_data = PLLVAL(132, 2, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) { .frequency = 226000000, .driver_data = PLLVAL(105, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) { .frequency = 266000000, .driver_data = PLLVAL(125, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) { .frequency = 268000000, .driver_data = PLLVAL(126, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { .frequency = 270000000, .driver_data = PLLVAL(127, 1, 1), },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static struct subsys_interface s3c2410_plls_interface = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .name = "s3c2410_plls",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .subsys = &s3c2410_subsys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .add_dev = s3c2410_plls_add,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static int __init s3c2410_pll_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return subsys_interface_register(&s3c2410_plls_interface);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) arch_initcall(s3c2410_pll_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static struct subsys_interface s3c2410a_plls_interface = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .name = "s3c2410a_plls",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .subsys = &s3c2410a_subsys,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .add_dev = s3c2410_plls_add,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int __init s3c2410a_pll_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return subsys_interface_register(&s3c2410a_plls_interface);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) arch_initcall(s3c2410a_pll_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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