Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2008 Simtec Electronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *	Ben Dooks <ben@simtec.co.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * S3C24XX - Memory map definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #ifndef __ASM_PLAT_MAP_S3C_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define __ASM_PLAT_MAP_S3C_H __FILE__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include "map.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define S3C24XX_VA_IRQ		S3C_VA_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define S3C24XX_VA_MEMCTRL	S3C_VA_MEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define S3C24XX_VA_UART		S3C_VA_UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define S3C24XX_VA_TIMER	S3C_VA_TIMER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define S3C24XX_VA_CLKPWR	S3C_VA_SYS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define S3C24XX_VA_WATCHDOG	S3C_VA_WATCHDOG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define S3C2412_VA_SSMC		S3C_ADDR_CPU(0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define S3C2412_VA_EBI		S3C_ADDR_CPU(0x00100000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define S3C2410_PA_UART		(0x50000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define S3C24XX_PA_UART		S3C2410_PA_UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * GPIO ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  * the calculation for the VA of this must ensure that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  * it is the same distance apart from the UART in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  * phsyical address space, as the initial mapping for the IO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * is done as a 1:1 mapping. This puts it (currently) at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  * 0xFA800000, which is not in the way of any current mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  * by the base system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define S3C2410_PA_GPIO		(0x56000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define S3C24XX_PA_GPIO		S3C2410_PA_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define S3C24XX_VA_GPIO		((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define S3C64XX_VA_GPIO		S3C_ADDR_CPU(0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define S3C64XX_VA_MODEM	S3C_ADDR_CPU(0x00100000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define S3C64XX_VA_USB_HSPHY	S3C_ADDR_CPU(0x00200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define S3C_VA_USB_HSPHY	S3C64XX_VA_USB_HSPHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define S3C2410_ADDR(x)		S3C_ADDR(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* deal with the registers that move under the 2412/2413 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #if defined(CONFIG_CPU_S3C2412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) extern void __iomem *s3c24xx_va_gpio2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #ifdef CONFIG_CPU_S3C2412_ONLY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define S3C24XX_VA_GPIO2	(S3C24XX_VA_GPIO + 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include "map-s5p.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #endif /* __ASM_PLAT_MAP_S3C_H */